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Publications of Author

1. Juha Alakarhu, Jarkko Niittylahti
   Scalar Metric for Temporal Locality and Estimation of Cache Performance. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:730-731 [Conf]
   
2. Jarno K. Tanskanen, Jarkko Niittylahti
   Parallel Memories in Video Encoding. [Citation Graph (0, 0)][DBLP]
   Data Compression Conference, 1999, pp:552- [Conf]
   
3. Tero Rissa, Milan Vasilko, Jarkko Niittylahti
   System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
   FCCM, 2002, pp:295-296 [Conf]
   
4. Tero Rissa, Tommi Mäkeläinen, Jarkko Niittylahti, Jouni Siirtola
   Fast Prototyping Using System Emulators. [Citation Graph (0, 0)][DBLP]
   FPL, 1998, pp:466-470 [Conf]
   
5. Tero Rissa, Jarkko Niittylahti
   A Hybrid Prototyping Platform for Dynamically Reconfigurable Designs. [Citation Graph (0, 0)][DBLP]
   FPL, 2000, pp:371-378 [Conf]
   
6. Jarkko Niittylahti, Harri Raittinen, Kimmo Kaski
   Dynamically Configurable Combinatory Logic Array as Boolean Neural Network. [Citation Graph (0, 0)][DBLP]
   ICTAI, 1993, pp:456-457 [Conf]
   
7. F. Curticapean, K. I. Palomaki, Jarkko Nittylahti
   Quadrature direct digital frequency synthesizer using an angle rotation algorithm. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2003, pp:81-84 [Conf]
   
8. K. I. Palomaki, Jarkko Nittylahti
   A low-power, memoryless direct digital frequency synthesizer architecture. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2003, pp:77-80 [Conf]
   
9. Riku Uusikartano, Jarkko Nittylahti, Markku Renfors
   Area-optimized FPGA implementation of a digital FM modulator. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 1999, pp:360-362 [Conf]
   
10. K. Palomaki, Jarkko Niittylahti, Markku Renfors
    Numerical sine and cosine synthesis using a complex multiplier. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 1999, pp:356-359 [Conf]
    
11. Jarno K. Tanskanen, Tero Sihvo, Jarkko Niittylahti
    Byte and modulo addressable parallel memory architecture for video coding. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2004, v:14, n:11, pp:1270-1276 [Journal]
    
12. Juha Alakarhu, Jarkko Niittylahti
    DRAM performance as a function of its structure and memory stream locality. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2004, v:28, n:2, pp:57-68 [Journal]
    
13. Jarkko Niittylahti, Juha Lemmetti, Juhana Helovuo
    High-performance implementation of wavelet algorithms on a standard PC. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:4, pp:173-179 [Journal]
    
14. Juha Alakarhu, Jarkko Niittylahti
    DRAM simulator for design and analysis of digital systems. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2002, v:26, n:4, pp:189-198 [Journal]
    
15. Sakari Junnila, Jarkko Niittylahti
    Wireless technologies for data acquisition systems. [Citation Graph (0, 0)][DBLP]
    ISICT, 2003, pp:132-137 [Conf]