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Eduard Alarcón: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Miquel Albiol, José Luis González, Eduard Alarcón
    Improved Design Methodology for High-Speed High-Accuracy Current Steering D/A Converters. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10636-10641 [Conf]
  2. Jordi Madrenas, Jordi Cosp, Lucas Oscar, Eduard Alarcón, Eva Vidal, Gerard Villar
    BIOSEG: a bioinspired vlsi analog system for image segmentation. [Citation Graph (0, 0)][DBLP]
    ESANN, 2004, pp:411-416 [Conf]
  3. Juan Manuel Moreno, Jordi Madrenas, Eduard Alarcón, Joan Cabestany
    Analog Sequential Architecture for Neuro-Fuzzy Models VLSI Implementation. [Citation Graph (0, 0)][DBLP]
    ICANN, 1997, pp:1199-1204 [Conf]
  4. Miquel Albiol, José Luis González, Eduard Alarcón
    Improved current-source sizing for high-speed high-accuracy current steering D/A converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2003, pp:837-840 [Conf]
  5. Spartacus Gomaríz, Eduard Alarcón, Francisco Guinjoan, Enric Vidal-Idiarte, Luis Martinez-Salamero, Domingo Biel
    TSK-fuzzy controller design for a PWM boost DC-DC switching regulator operating at different steady state output voltages. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:848-851 [Conf]
  6. Herminio Martínez, Eva Vidal, Eduard Alarcón, Alberto Poveda
    Dynamic modelling of analog integrated filters for the stability study of on-chip automatic tuning loops. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2004, pp:273-276 [Conf]
  7. Gerard Villar, Eduard Alarcón, Francesc Guinjoan, Alberto Poveda
    A design space exploration for integrated switching power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2003, pp:304-307 [Conf]
  8. Gerard Villar, Eduard Alarcón, Francesc Guinjoan, Alberto Poveda
    Optimized design of MOS capacitors in standard CMOS technology and evaluation of their Equivalent Series Resistance for power applications. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2003, pp:451-454 [Conf]
  9. Gerard Villar, Eduard Alarcón, Francesc Guinjoan, Alberto Poveda
    Efficiency-oriented switching frequency tuning for a buck switching power converter. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2005, pp:2473-2476 [Conf]
  10. Gerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda
    Energy optimization of tapered buffers for CMOS on-chip switching power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:4453-4456 [Conf]
  11. Gerard Villar, Eduard Alarcón, Herminio Martínez, Eva Vidal, Francesc Guinjoan, Sonia Porta, Alberto Poveda
    Hysteric controller for CMOS on-chip switching power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2004, pp:552-555 [Conf]
  12. Gerard Villar, Eduard Alarcón, Herminio Martínez, Eva Vidal, Sonia Porta, Francesc Guinjoan, Alberto Poveda
    Multi-mode controller CMOS integrated circuit for switching power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2005, pp:4457-4460 [Conf]
  13. Vahid Yousefzadeh, Eduard Alarcón, Dragan Maksimovic
    Efficiency optimization in linear-assisted switching power converters for envelope tracking in RF power amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1302-1305 [Conf]
  14. Eduard Alarcón, Alberto Poveda, Eva Vidal, Herminio Martínez
    Analog current-mode implementation of a one-cycle integrated controller for switching power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:496-499 [Conf]
  15. Eduard Alarcón, A. Romero, Alberto Poveda, Sonia Porta, Luis Martinez-Salamero
    Sliding-mode control analog integrated circuit for switching DC-DC power converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:500-503 [Conf]
  16. José Luis González, Eduard Alarcón
    Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2001, pp:512-515 [Conf]
  17. Spartacus Gomaríz, Eduard Alarcón, Francesc Guinjoan, Enric Vidal-Idiarte, Luis Martinez-Salamero
    Two-rules-based boundary layer fuzzy controller for DC to DC switching regulators. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2001, pp:664-667 [Conf]
  18. Spartacus Gomaríz, Eduard Alarcón, Francesc Guinjoan, Enric Vidal-Idiarte, Luis Martinez-Salamero
    Piecewise PWM-sliding global control of a boost switching regulator by means of first-order Takagi-Sugeno fuzzy control. [Citation Graph (0, 0)][DBLP]
    ISCAS (3), 2001, pp:715-718 [Conf]
  19. Gerard Villar, Eduard Alarcón, Herminio Martínez, Domingo Biel, Eva Vidal, Alberto Poveda
    Averaging circuit for switching power converter control: a CMOS current-mode integrated implementation. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:269-272 [Conf]
  20. Eduard Alarcón, Gerard Villar, Alberto Poveda
    CMOS Integrated Circuit Controllers For Switching Power Converters. [Citation Graph (0, 0)][DBLP]
    Journal of Circuits, Systems, and Computers, 2004, v:13, n:4, pp:789-811 [Journal]
  21. E. Rodriguez, Gerard Villar, Francesc Guinjoan, Alberto Poveda, A. El-Aroudi, Eduard Alarcón
    General-purpose ripple-based fast-scale instability prediction in switching power regulators. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:2423-2426 [Conf]
  22. L. Marco, Eduard Alarcón, Dragan Maksimovic
    Effects of switching power converter nonidealities in envelope elimination and restoration technique. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  23. Eduard Alarcón, A. El-Aroudi, J. Martinez-Artega, Gerard Villar, Francesc Guinjoan, Alberto Poveda
    Predicting fast-scale instabilities in switching power converters: a ripple-based unified perspective. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  24. Herminio Martínez, Eva Vidal, Eduard Alarcón, Alberto Poveda
    Improving the stability of on-chip automatic tuning loops for continuous-time filters with an analog adaptive controller. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  25. L. Marco, Alberto Poveda, Eduard Alarcón, Dragan Maksimovic
    Bandwidth limits in PWM switching amplifiers. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]

  26. Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentation. [Citation Graph (, )][DBLP]


  27. Selective similarity function for VLSI analog signal processing. [Citation Graph (, )][DBLP]


  28. An asynchronous finite state machine controller for integrated buck-boost power converters in wideband signal-tracking applications. [Citation Graph (, )][DBLP]


  29. Automatic dead-time adjustment CMOS mixed-signal circuit for a DCM-operated 3-level switching power converter. [Citation Graph (, )][DBLP]


  30. Low-OSR asynchronous Sigma-Delta modulation high-order buck converter for efficient wideband switching amplification. [Citation Graph (, )][DBLP]


  31. Inductor-current zero-crossing detection mixed-signal CMOS circuit for a DCM-operated 3-level switching power converter. [Citation Graph (, )][DBLP]


  32. Characterizing fast-scale instability in a buck-based switching amplifier for wideband tracking. [Citation Graph (, )][DBLP]


  33. SystemC-WMS modeling of control techniques for switching amplifiers targeting polar RF transmitters. [Citation Graph (, )][DBLP]


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