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Publications of Author

1. Alexandros Bartzas, Stylianos Mamagkakis, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
   Dynamic data type refinement methodology for systematic performance-energy design exploration of network applications. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:740-745 [Conf]
   
2. Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
   A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck. [Citation Graph (0, 0)][DBLP]
   DATE, 2005, pp:946-947 [Conf]
   
3. K. Siozios, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis
   A novel methodology for designing high-performance and low-energy FPGA routing architecture. [Citation Graph (0, 0)][DBLP]
   FPGA, 2006, pp:224- [Conf]
   
4. Nikolas Kroupis, Minas Dasygenis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis, Nikolaos D. Zervas, Constantinos E. Goutis
   Power, performance and area exploration of block matching algorithms mapped on programmable processors. [Citation Graph (0, 0)][DBLP]
   ICIP (3), 2001, pp:728-731 [Conf]
   
5. Evaggelia Theochari, Konstantinos Tatas, Dimitrios Soudris, Kostas Masselos, Konstantinos Potamianos, Spyros Blionas, Antonios Thanailakis
   A reusable IP FFT core for DSP applications. [Citation Graph (0, 0)][DBLP]
   ISCAS (3), 2004, pp:621-624 [Conf]
   
6. Minas Dasygenis, Erik Brockmeyer, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
   Improving the Memory Bandwidth Utilization Using Loop Transformations. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2005, pp:117-126 [Conf]
   
7. Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis
   Designing Alternative FPGA Implementations Using Spatial Data from Hardware Resources. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2006, pp:403-414 [Conf]
   
8. Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
   Power, Performance and Area Exploration for Data Memory Assignment of Multimedia Applications. [Citation Graph (0, 0)][DBLP]
   SAMOS, 2004, pp:540-549 [Conf]
   
9. Nikolas Kroupis, Minas Dasygenis, Dimitrios Soudris, Antonios Thanailakis
   A Modified Spiral Search Algorithm and its Embedded Hardware Implementation. [Citation Graph (0, 0)][DBLP]
   IEC (Prague), 2005, pp:375-378 [Conf]
   
10. Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, José M. Mendías, Antonios Thanailakis
    Reducing Memory Fragmentation with Performance-Optimized Dynamic Memory Allocators in Network Applications. [Citation Graph (0, 0)][DBLP]
    WWIC, 2005, pp:354-364 [Conf]
    
11. Stylianos Mamagkakis, Alexandros Mpartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Jose Manuel Mendias, Antonios Thanailakis
    Design of Energy Efficient Wireless Networks Using Dynamic Data Type Refinement Methodology. [Citation Graph (0, 0)][DBLP]
    WWIC, 2004, pp:26-37 [Conf]
    
12. Stylianos Mamagkakis, Christos Baloukas, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
    Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance. [Citation Graph (0, 0)][DBLP]
    Computer Communications, 2006, v:29, n:13-14, pp:2612-2620 [Journal]
    
13. Konstantinos Tatas, Minas Dasygenis, Nikolas Kroupis, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
    Data memory power optimization and performance exploration of embedded systems for implementing motion estimation algorithms. [Citation Graph (0, 0)][DBLP]
    Real-Time Imaging, 2003, v:9, n:6, pp:371-386 [Journal]
    
14. Ioannis Tsimperidis, Ioannis Karafyllidis, Antonios Thanailakis
    Design and simulation of a nanoelectronic single-electron universal Control-Control-Not gate. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2004, v:35, n:5, pp:471-478 [Journal]
    
15. Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis
    Efficient Power Management Strategy of FPGAs Using a Novel Placement Technique. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:204-209 [Conf]
    
16. Kostas Siozios, Stelios Mamagkakis, Dimitrios Soudris, Antonios Thanailakis
    Designing Heterogeneous FPGAs with Multiple SBs. [Citation Graph (0, 0)][DBLP]
    ARC, 2007, pp:91-96 [Conf]
    
17. Minas Dasygenis, Erik Brockmeyer, Bart Durinck, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
    A Memory Hierarchical Layer Assigning and Prefetching Technique to Overcome the Memory Performance/Energy Bottleneck [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]
    
18. Stylianos Mamagkakis, Alexandros Bartzas, Georgios Pouiklis, David Atienza, Francky Catthoor, Dimitrios Soudris, Antonios Thanailakis
    Systematic methodology for exploration of performance - Energy trade-offs in network applications using Dynamic Data Type refinement. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2007, v:53, n:7, pp:417-436 [Journal]
    
19. Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
    Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:153-171 [Journal]