The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Stylianos Perissakis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Fotis Andritsopoulos, C. Charopoulos, Gregory Doumenis, Fotis Karoubalis, Yannis Mitsos, F. Petreas, Ioanna Theologitou, Stylianos Perissakis, Dionisios I. Reisis
    Verification of a Complex SoC: The PRO3 Case-Study. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:20224-20231 [Conf]
  2. G. Lykakis, N. Mouratidis, Kyriakos Vlachos, Nikos A. Nikolaou, Stylianos Perissakis, G. Sourdis, George E. Konstantoulakis, Dionisios N. Pnevmatikatos, Dionisios I. Reisis
    Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:20014-20019 [Conf]
  3. David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
    Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. [Citation Graph (0, 0)][DBLP]
    ICCD, 1997, pp:2-7 [Conf]
  4. Richard Fromm, Stylianos Perissakis, Neal Cardwell, Christoforos E. Kozyrakis, Bruce McGaughy, David A. Patterson, Thomas E. Anderson, Katherine A. Yelick
    The Energy Efficiency of IRAM Architectures. [Citation Graph (0, 0)][DBLP]
    ISCA, 1997, pp:327-337 [Conf]
  5. Kyriakos Vlachos, Nikos A. Nikolaou, Theofanis Orphanoudakis, Stylianos Perissakis, Dionisios N. Pnevmatikatos, George Kornaros, J. A. Sanchez, George E. Konstantoulakis
    Processing and Scheduling Components in an Innovative Network Processor Architecture. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2003, pp:195-201 [Conf]
  6. Christoforos E. Kozyrakis, Stylianos Perissakis, David A. Patterson, Thomas E. Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Randi Thomas, Noah Treuhaft, Katherine A. Yelick
    Scalable Processors in the Billion-Transistor Era: IRAM. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1997, v:30, n:9, pp:75-78 [Journal]
  7. Ioannis Papaefstathiou, Stylianos Perissakis, Theofanis Orphanoudakis, Nikos A. Nikolaou, George Kornaros, Nicholas Zervos, George E. Konstantoulakis, Dionisios N. Pnevmatikatos, Kyriakos Vlachos
    PRO3: A Hybrid NPU Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2004, v:24, n:5, pp:20-33 [Journal]
  8. Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis
    Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. [Citation Graph (0, 0)][DBLP]
    Telecommunication Systems, 2003, v:23, n:3-4, pp:351-367 [Journal]
  9. André DeHon, Yury Markovskiy, Eylon Caspi, Michael Chu, Randy Huang, Stylianos Perissakis, Laura Pozzi, Joseph Yeh, John Wawrzynek
    Stream computations organized for reconfigurable execution. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2006, v:30, n:6, pp:334-354 [Journal]

Search in 0.082secs, Finished in 0.082secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002