The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Maya Gokhale: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Valerie Taylor, Paul Graham, Maya Gokhale
    A hybrid framework for design and analysis of fault-tolerant architectures. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:335-336 [Conf]
  2. Christophe Wolinski, Krzysztof Kuchcinski, Maya Gokhale
    A Constraints Programming Approach to Communication Scheduling on SoPC Architectures. [Citation Graph (0, 0)][DBLP]
    DSD, 2004, pp:308-315 [Conf]
  3. Reid B. Porter, Jan R. Frigo, Maya Gokhale, Christophe Wolinski, François Charot, Charles Wagner
    A Run-Time Re-configurable Parametric Architecture for Local Neighborhood Image Processing. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:107-115 [Conf]
  4. Reid B. Porter, Maya Gokhale, Neal R. Harvey, Simon Perkins, A. Cody Young
    Evolving Network Architectures With Custom Computers For Multi-Spectral Feature Identification. [Citation Graph (0, 0)][DBLP]
    Evolvable Hardware, 2001, pp:261-270 [Conf]
  5. Christophe Wolinski, Frans Trouw, Maya Gokhale
    A Preliminary Study of Molecular Dynamics on Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
    Engineering of Reconfigurable Systems and Algorithms, 2003, pp:304-307 [Conf]
  6. Maya Gokhale, Christopher Rickett, Justin L. Tripp, Chung Hsu, Ronald Scrofano
    Promises and Pitfalls of Reconfigurable Supercomputing. [Citation Graph (0, 0)][DBLP]
    ERSA, 2006, pp:11-20 [Conf]
  7. Maya Gokhale, Christine Ahrens, Janette Frigo, Christophe Wolinski
    Communications Scheduling for Concurrent Processes on Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
    FCCM, 2004, pp:186-193 [Conf]
  8. Maya Gokhale, D. Gomersall
    High level compilation for fine grained FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 1997, pp:165-174 [Conf]
  9. Maya Gokhale, Janice M. Stone
    NAPA C: Compiling for a Hybrid RISC/FPGA Architecture. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:126-0 [Conf]
  10. Janette Frigo, David Palmer, Maya Gokhale, Marc Popkin-Paine
    Gamma-Ray Pulsar Detection using Reconfigurable Computing Hardware. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:155-161 [Conf]
  11. Maya Gokhale, Janice M. Stone
    Automatic Allocation of Arrays to Memories in FPGA Processors with Multiple Memory Banks. [Citation Graph (0, 0)][DBLP]
    FCCM, 1999, pp:63-69 [Conf]
  12. Maya Gokhale, Janice M. Stone, Jeffrey M. Arnold, Mirek Kalinowski
    Stream-Oriented FPGA Computing in the Streams-C High Level Language. [Citation Graph (0, 0)][DBLP]
    FCCM, 2000, pp:49-58 [Conf]
  13. Justin L. Tripp, Henning S. Mortveit, Anders A. Hansson, Maya Gokhale
    Metropolitan Road Traffic Simulation on FPGAs. [Citation Graph (0, 0)][DBLP]
    FCCM, 2005, pp:117-126 [Conf]
  14. Charlé R. Rupp, Mark Landguth, Tim Garverick, Edson Gomersall, Harry Holt, Jeffrey M. Arnold, Maya Gokhale
    The NAPA Adaptive Processing Architecture. [Citation Graph (0, 0)][DBLP]
    FCCM, 1998, pp:28-0 [Conf]
  15. Christophe Wolinski, Maya Gokhale, Kevin McCabe
    Fabric-Based Systems: Model, Tools, Applications. [Citation Graph (0, 0)][DBLP]
    FCCM, 2003, pp:288-289 [Conf]
  16. Ronald Scrofano, Maya Gokhale, Frans Trouw, Viktor K. Prasanna
    Hardware/Software Approach to Molecular Dynamics on Reconfigurable Computers. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:23-34 [Conf]
  17. Heather Quinn, Debayan Bhaduri, Christof Teuscher, Paul Graham, Maya Gokhale
    The STAR-C Truth: Analyzing Reconfigurable Supercomputing Reliability. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:323-324 [Conf]
  18. Reid B. Porter, Jan R. Frigo, Maya Gokhale, Christophe Wolinski, François Charot, Charles Wagner
    A Programmable, Maximal Throughput Architecture for Neighborhood Image Processing. [Citation Graph (0, 0)][DBLP]
    FCCM, 2006, pp:279-280 [Conf]
  19. Janette Frigo, Maya Gokhale, Dominique Lavenier
    Evaluation of the streams-C C-to-FPGA compiler: an applications perspective. [Citation Graph (0, 0)][DBLP]
    FPGA, 2001, pp:134-140 [Conf]
  20. Christophe Wolinski, Krzysztof Kuchcinski, Maya Gokhale
    A constraints programming approach to communication scheduling on SoPC architectures. [Citation Graph (0, 0)][DBLP]
    FPGA, 2004, pp:252- [Conf]
  21. Maya Gokhale, Dave Dubois, Andy Dubois, Mike Boorman, Steve Poole, Vic Hogsett
    Granidt: Towards Gigabit Rate Network Intrusion Detection Technology. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:404-413 [Conf]
  22. Maya Gokhale, Janette Frigo, Christine Ahrens, Justin L. Tripp, Ronald Minnich
    Monte Carlo Radiative Heat Transfer Simulation on a Reconfigurable Computer. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:95-104 [Conf]
  23. Maya Gokhale, Aaron Marks
    Automatic Synthesis of Parallel Programs Targeted to Dynamically Reconfigurable Logic Arrays. [Citation Graph (0, 0)][DBLP]
    FPL, 1995, pp:399-408 [Conf]
  24. Justin L. Tripp, Kristopher D. Peterson, Christine Ahrens, Jeffrey D. Poznanovic, Maya Gokhale
    Trident: An FPGA Compiler Framework for Floating-Point Algorithms. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:317-322 [Conf]
  25. Yan Solihin, Kirk W. Cameron, Yong Luo, Dominique Lavenier, Maya Gokhale
    Mutable Functional Units and Their Applications on Microprocessors. [Citation Graph (0, 0)][DBLP]
    ICCD, 2001, pp:234-239 [Conf]
  26. Maya Gokhale
    Macro vs. Micro Dataflow: A Programming Example. [Citation Graph (0, 0)][DBLP]
    ICPP, 1986, pp:849-852 [Conf]
  27. Maya Gokhale
    Exploiting Loop Level Parallelism in Nonprocedural Dataflow Programs. [Citation Graph (0, 0)][DBLP]
    ICPP, 1987, pp:305-311 [Conf]
  28. Maya Gokhale, William Holmes, Andrew Kopser, Dick Kunze, Daniel P. Lopresti, Sara Lucas, Ronald Minnich, Peter Olsen
    SPLASH: A Reconfigurable Linear Logic Array. [Citation Graph (0, 0)][DBLP]
    ICPP (1), 1990, pp:526-532 [Conf]
  29. Maya Gokhale, Phil Pfeiffer
    SIMD Optimizations in a Data Parallel C. [Citation Graph (0, 0)][DBLP]
    ICPP, 1993, pp:188-191 [Conf]
  30. Alexander C. Klaiber, Maya Gokhale
    Parallel Evaluation of Attribute Grammars. [Citation Graph (0, 0)][DBLP]
    ICPP (3), 1989, pp:193-201 [Conf]
  31. Maya Gokhale, Paul Graham, Eric Johnson, Nathan Rollins, Michael J. Wirthlin
    Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2004, pp:- [Conf]
  32. Maya Gokhale
    RAW keynote 1: the outer limits: reconfigurable computing in space and in orbit. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2006, pp:- [Conf]
  33. Maya Gokhale, Todd C. Torgersen
    The symbolic hyperplane transformation for recursively defined arrays. [Citation Graph (0, 0)][DBLP]
    SC, 1988, pp:207-214 [Conf]
  34. Justin L. Tripp, Anders A. Hansson, Maya Gokhale, Henning S. Mortveit
    Partitioning Hardware and Software for Reconfigurable Supercomputing Applications: A Case Study. [Citation Graph (0, 0)][DBLP]
    SC, 2005, pp:27- [Conf]
  35. Debayan Bhaduri, Sandeep K. Shukla, Paul Graham, Maya Gokhale
    Scalable techniques and tools for reliability analysis of large circuits. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:705-710 [Conf]
  36. Jeremy Kepner, Maya Gokhale, Ronald Minnich, Aaron Marks, John DeGood
    Interfacing interpreted and compiled languages to support applications on a massively parallel network of workstations (MP-NOW). [Citation Graph (0, 0)][DBLP]
    Cluster Computing, 2000, v:3, n:1, pp:35-44 [Journal]
  37. Maya Gokhale, William Holmes, Ken Iobst
    Processing in Memory: The Terasys Massively Parallel PIM Array. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1995, v:28, n:4, pp:23-31 [Journal]
  38. Maya Gokhale, William Holmes, Andrew Kopser, Sara Lucas, Ronald Minnich, Douglas Sweely, Daniel P. Lopresti
    Building and Using a Highly Parallel Programmable Logic Array. [Citation Graph (0, 0)][DBLP]
    IEEE Computer, 1991, v:24, n:1, pp:81-89 [Journal]
  39. Jeremy Kepner, Maya Gokhale, Ronald Minnich, Aaron Marks, John DeGood
    Interfacing Interpreted and Compiled Languages to Support Applications on a Massively Parallel Network of Workstations (MP-NOW) [Citation Graph (0, 0)][DBLP]
    CoRR, 1999, v:0, n:, pp:- [Journal]
  40. Christophe Wolinski, Maya Gokhale, Kevin McCabe
    Polymorphous fabric-based systems: Model, tools, applications. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2003, v:49, n:4-6, pp:143-154 [Journal]
  41. Thomas J. Myers, Maya Gokhale
    Parallel Scheduling of Recursively Defined Arrays. [Citation Graph (0, 0)][DBLP]
    J. Symb. Comput., 1988, v:6, n:1, pp:65-81 [Journal]
  42. Christophe Wolinski, Maya Gokhale, Kevin McCabe
    A Polymorphous Computing Fabric. [Citation Graph (0, 0)][DBLP]
    IEEE Micro, 2002, v:22, n:5, pp:56-68 [Journal]
  43. Maya Gokhale, Janette Frigo, Kevin McCabe, James Theiler, Christophe Wolinski, Dominique Lavenier
    Experience with a Hybrid Processor: K-Means Clustering. [Citation Graph (0, 0)][DBLP]
    The Journal of Supercomputing, 2003, v:26, n:2, pp:131-148 [Journal]
  44. Alexander C. Klaiber, Maya Gokhale
    Parallel Evaluation of Attribute Grammars. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Parallel Distrib. Syst., 1992, v:3, n:2, pp:206-220 [Journal]
  45. D. Michael Cai, Maya Gokhale, James Theiler
    Comparison of feature selection and classification algorithms in identifying malicious executables. [Citation Graph (0, 0)][DBLP]
    Computational Statistics & Data Analysis, 2007, v:51, n:6, pp:3156-3172 [Journal]
  46. Reid B. Porter, Jan Frigo, Al Conti, Neal Harvey, Garrett Kenyon, Maya Gokhale
    A reconfigurable computing framework for multi-scale cellular image processing. [Citation Graph (0, 0)][DBLP]
    Microprocessors and Microsystems, 2007, v:31, n:8, pp:546-563 [Journal]

  47. Application Experiments: MPPA and FPGA. [Citation Graph (, )][DBLP]


  48. On the Acceleration of Shortest Path Calculations in Transportation Networks. [Citation Graph (, )][DBLP]


  49. Application Experiments: MPPA and FPGA. [Citation Graph (, )][DBLP]


  50. Language classification using n-grams accelerated by FPGA-based Bloom filters. [Citation Graph (, )][DBLP]


  51. Trident: From High-Level Language to Hardware Circuitry. [Citation Graph (, )][DBLP]


  52. Hardware Technologies for High-Performance Data-Intensive Computing. [Citation Graph (, )][DBLP]


Search in 0.023secs, Finished in 0.026secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002