The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Larry T. Pileggi: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
    Specification Test Compaction for Analog Circuits and MEMS. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:164-169 [Conf]
  2. Radu Marculescu, Diana Marculescu, Larry T. Pileggi
    Toward an Integrated Design Methodology for Fault-Tolerant, Multiple Clock/Voltage Integrated Systems. [Citation Graph (0, 0)][DBLP]
    ICCD, 2004, pp:168-173 [Conf]
  3. Brian Taylor, Larry T. Pileggi
    Exact Combinatorial Optimization Methods for Physical Design of Regular Logic Bricks. [Citation Graph (0, 0)][DBLP]
    DAC, 2007, pp:344-349 [Conf]
  4. Sounil Biswas, Peng Li, R. D. (Shawn) Blanton, Larry T. Pileggi
    Specification Test Compaction for Analog Circuits and MEMS [Citation Graph (0, 0)][DBLP]
    CoRR, 2007, v:0, n:, pp:- [Journal]

  5. Automated Testability Enhancements for Logic Brick Libraries. [Citation Graph (, )][DBLP]


  6. Efficient statistical analysis of read timing failures in SRAM circuits. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002