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Sara Blanc: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Sara Blanc, J. Gracia, Pedro J. Gil
    Experiences during the Experimental Validation of the Time-Triggered Architecture. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:256-261 [Conf]
  2. Sara Blanc, J. Gracia, Pedro J. Gil
    A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques. [Citation Graph (0, 0)][DBLP]
    DFT, 2002, pp:254-262 [Conf]
  3. Sara Blanc, Pedro J. Gil
    Improving the Multiple Errors Detection Coverage in Distributed Embedded Systems. [Citation Graph (0, 0)][DBLP]
    SRDS, 2003, pp:303-0 [Conf]

  4. Generic Design and Automatic Deployment of NMR Strategies on HW Cores. [Citation Graph (, )][DBLP]


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