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Publications of Author

1. Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
   A Physical Design Tool for Built-in Self-Repairable Static RAMs. [Citation Graph (0, 0)][DBLP]
   DATE, 1999, pp:714-0 [Conf]
   
2. Wilm E. Donath, Prabhakar Kudva, Leon Stok, Paul Villarrubia, Lakshmi N. Reddy, Andrew Sullivan, Kanad Chakraborty
   Transformational Placement and Synthesis. [Citation Graph (0, 0)][DBLP]
   DATE, 2000, pp:194-201 [Conf]
   
3. Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder
   A Silicon Compiler for Fault-Tolerant ROMs. [Citation Graph (0, 0)][DBLP]
   DFT, 1998, pp:270-275 [Conf]
   
4. Kanad Chakraborty, Natesan Venkateswaran
   Congestion Mitigation During Placement. [Citation Graph (0, 0)][DBLP]
   Great Lakes Symposium on VLSI, 1999, pp:228-229 [Conf]
   
5. Kanad Chakraborty, Pinaki Mazumder
   An efficient, bus-layout based method for early diagnosis of bussed driver shorts in printed circuit boards. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1996, pp:685-688 [Conf]
   
6. Venkat Rao Vallapenani, Ravi Shankar Chevuri, Bingxiong Xu, Lun Ye, Kanad Chakraborty
   Efficient Techniques for Noise Characterization of Sequential Cells and Macros. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2006, pp:363-368 [Conf]
   
7. Anurag Gupta, Kanad Chakraborty, Pinaki Mazumder
   FTROM: A Silicon Compiler for Fault-tolerant ROMs. [Citation Graph (0, 0)][DBLP]
   Integration, 1998, v:26, n:1-2, pp:117-140 [Journal]
   
8. Maharaj Mukherjee, Kanad Chakraborty
   A polynomial-time optimization algorithm for a rectilinear partitioning problem with applications in VLSI design automation. [Citation Graph (0, 0)][DBLP]
   Inf. Process. Lett., 2002, v:83, n:1, pp:41-48 [Journal]
   
9. Kanad Chakraborty, Kishan Mehrotra, Chilukuri K. Mohan, Sanjay Ranka
   Forecasting the behavior of multivariate time series using neural networks. [Citation Graph (0, 0)][DBLP]
   Neural Networks, 1992, v:5, n:6, pp:961-970 [Journal]
   
10. Kanad Chakraborty, Kishan G. Mehrotra, Chilukuri K. Mohan, Sanjay Ranka
    Response to letter by Q. Hu and D. B. Hertz. [Citation Graph (0, 0)][DBLP]
    Neural Networks, 1994, v:7, n:1, pp:203-204 [Journal]
    
11. Kanad Chakraborty, Alexey Lvov, Maharaj Mukherjee
    Novel algorithms for placement of rectangular covers for mask inspection in advanced lithography and other VLSI design applications. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:1, pp:79-91 [Journal]
    
12. Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta
    A physical design tool for built-in self-repairable RAMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:2, pp:352-364 [Journal]
    
13. 
    A programmable boundary scan technique for board-level, parallel functional duplex march testing of word-oriented multiport static RAMs. [Citation Graph (, )][DBLP]
    
    
14. 
    A Randomized Greedy Algorithm for the Pattern Fill Problem for DFM Applications. [Citation Graph (, )][DBLP]
    
    
15. 
    A MATLAB-based technique for defect level estimation using data mining of test fallout data versus fault coverage. [Citation Graph (, )][DBLP]