The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Mayukh Bhattacharya: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kanad Chakraborty, Anurag Gupta, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
    A Physical Design Tool for Built-in Self-Repairable Static RAMs. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:714-0 [Conf]
  2. Mayukh Bhattacharya, Pinaki Mazumder
    Noise Margins of Threshold Logic Gates containing Resonant Tunneling Diodes. [Citation Graph (0, 0)][DBLP]
    Great Lakes Symposium on VLSI, 1998, pp:65-70 [Conf]
  3. Alejandro F. González, Mayukh Bhattacharya, Shriram Kulkarni, Pinaki Mazumder
    Standard CMOS Implementation of a Multiple-Valued Logic Signed-Digit Adder Based on Negative Differential-Resistance Devices. [Citation Graph (0, 0)][DBLP]
    ISMVL, 2000, pp:323-0 [Conf]
  4. Mayukh Bhattacharya, Pinaki Mazumder
    Convergence Issues in Resonant Tunneling Diode Circuit Simulation. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:499-0 [Conf]
  5. Mayukh Bhattacharya, Pinaki Mazumder, Ronald J. Lomax
    Fd-Tlm Electromagnetic Field Simulation Of High-Speed Iii-V Heterojunction Bipolar Transistor Digital Logic Gates. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:470-474 [Conf]
  6. Pinaki Mazumder, Shriram Kulkarni, Mayukh Bhattacharya, Alejandro F. González
    Circuit Design using Resonant Tunneling Diodes. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1998, pp:501-506 [Conf]
  7. Qinwei Xu, Pinaki Mazumder, Mayukh Bhattacharya
    Modeling of Nonuniform Interconnects by Using Differential Quadrature Method. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:327-332 [Conf]
  8. Mayukh Bhattacharya, Pinaki Mazumder
    Augmentation of SPICE for simulation of circuits containingresonant tunneling diodes. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:1, pp:39-50 [Journal]
  9. Kanad Chakraborty, Shriram Kulkarni, Mayukh Bhattacharya, Pinaki Mazumder, Anurag Gupta
    A physical design tool for built-in self-repairable RAMs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2001, v:9, n:2, pp:352-364 [Journal]

Search in 0.273secs, Finished in 0.274secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002