The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Weize Xie: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He
    Clocktree RLC Extraction with Efficient Inductance Modeling. [Citation Graph (0, 0)][DBLP]
    DATE, 2000, pp:522-0 [Conf]
  2. Yingxin Pang, Chung-Kuan Cheng, Koen Lampaert, Weize Xie
    Rectilinear block packing using O-tree representation. [Citation Graph (0, 0)][DBLP]
    ISPD, 2001, pp:156-161 [Conf]
  3. Yu Cao, Xuejue Huang, Chenming Hu, Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie
    Effective On-chip Inductance Modeling for Multiple Signal Lines and Application on Repeater Insertion. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:185-190 [Conf]
  4. Zhenyu Tang, Lei He, Norman Chang, Shen Lin, Weize Xie, Sam Nakagawa
    Instruction Prediction for Step Power Reduction. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:211-216 [Conf]
  5. Zhiping Yu, Dan Yergeau, Robert W. Dutton, Sam Nakagawa, Norman Chang, Shen Lin, Weize Xie
    Full Chip Thermal Simulation. [Citation Graph (0, 0)][DBLP]
    ISQED, 2000, pp:145-150 [Conf]
  6. Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He
    Ramp Up/Down Functional Unit to Reduce Step Power. [Citation Graph (0, 0)][DBLP]
    PACS, 2000, pp:13-24 [Conf]
  7. Yu Cao, Xuejue Huang, N. H. Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Dennis Sylvester, Chenming Hu
    Effective on-chip inductance modeling for multiple signal lines and application to repeater insertion. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2002, v:10, n:6, pp:799-805 [Journal]

Search in 0.014secs, Finished in 0.015secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002