The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Josef Eckmueller: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Josef Eckmueller, Martin Groepl, Helmut E. Graeb
    Hierarchical Characterization of Analog Integrated CMOS Circuits. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:636-643 [Conf]
  2. Robert Schwencker, Josef Eckmueller, Helmut E. Graeb, Kurt Antreich
    Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:323-327 [Conf]
  3. Helmut E. Graeb, Stephan Zizala, Josef Eckmueller, Kurt Antreich
    The Sizing Rules Method for Analog Integrated Circuit Design. [Citation Graph (0, 0)][DBLP]
    ICCAD, 2001, pp:343-349 [Conf]
  4. M. Brandenburg, A. Schöllhorn, S. Heinen, Josef Eckmueller, T. Eckart
    From algorithm to first 3.5G call in record time: a novel system design approach based on virtual prototyping and its consequences for interdisciplinary system design teams. [Citation Graph (0, 0)][DBLP]
    DATE, 2007, pp:828-830 [Conf]

Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002