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Miguel L. Silva: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
    A Novel Methodology for the Concurrent Test of Partial and Dynamically Reconfigurable SRAM-Based FPGAs. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1126- [Conf]
  2. Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
    Run-Time Management of Logic Resources on Reconfigurable Systems. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10974-10979 [Conf]
  3. Miguel L. Silva, João Canas Ferreira
    Using a Tightly-Coupled Pipeline in Dynamically Reconfigurable Platform FPGAs. [Citation Graph (0, 0)][DBLP]
    DSD, 2005, pp:383-387 [Conf]
  4. Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. M. Ferreira
    On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:302-311 [Conf]
  5. Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
    DRAFT: An On-Line Fault Detection Method for Dynamic and Partially Reconfigurable FPGAs. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2001, pp:34-36 [Conf]
  6. Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
    Active Replication: Towards a Truly SRAM-Based FPGA On-Line Concurrent Testing. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:165-169 [Conf]
  7. Miguel L. Silva, João Canas Ferreira
    Support for partial run-time reconfiguration of platform FPGAs. [Citation Graph (0, 0)][DBLP]
    Journal of Systems Architecture, 2006, v:52, n:12, pp:709-726 [Journal]

  8. Generation of partial FPGA configurations at run-time. [Citation Graph (, )][DBLP]


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