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Santiago González Pestana: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Kees Goossens, John Dielissen, Om Prakash Gangwal, Santiago González Pestana, Andrei Radulescu, Edwin Rijpkema
    A Design Flow for Application-Specific Networks on Chip with Guaranteed Performance to Accelerate SOC Design and Verification. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:1182-1187 [Conf]
  2. Santiago González Pestana, Edwin Rijpkema, Andrei Radulescu, Kees G. W. Goossens, Om Prakash Gangwal
    Cost-Performance Trade-Offs in Networks on Chip: A Simulation-Based Approach. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:764-769 [Conf]
  3. Edwin van Dalen, Santiago González Pestana, Antoine van Wel
    An Integrated, Low-Power Processor for Image Signal Processing. [Citation Graph (0, 0)][DBLP]
    ISM, 2006, pp:501-508 [Conf]
  4. Andrei Radulescu, John Dielissen, Santiago González Pestana, Om Prakash Gangwal, Edwin Rijpkema, Paul Wielage, Kees G. W. Goossens
    An efficient on-chip NI offering guaranteed services, shared-memory abstraction, and flexible network configuration. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:1, pp:4-17 [Journal]

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