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Publications of Author

1. Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
   Test generation for combinational quantum cellular automata (QCA) circuits. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:311-316 [Conf]
   
2. Loganathan Lingappan, Srivaths Ravi, Niraj K. Jha
   Test Generation for Non-separable RTL Controller-datapath Circuits using a Satisfiability based Approach. [Citation Graph (0, 0)][DBLP]
   ICCD, 2003, pp:187-193 [Conf]
   
3. Loganathan Lingappan, Niraj K. Jha
   Improving the Performance of Automatic Sequential Test Generation by Targeting Hard-to-Test Faults. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2006, pp:431-436 [Conf]
   
4. Loganathan Lingappan, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat T. Chakradhar
   Heterogeneous and Multi-Level Compression Techniques for Test Volume Reduction in Systems-on-Chip. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2005, pp:65-70 [Conf]
   
5. Loganathan Lingappan, Vijay Gangaram, Niraj K. Jha
   Fast Enhancement of Validation Test Sets to Improve Stuck-at Fault Coverage for RTL circuits. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 2007, pp:504-512 [Conf]
   
6. Loganathan Lingappan, Niraj K. Jha
   Unsatisfiability Based Efficient Design for Testability Solution for Register-Transfer Level Circuits. [Citation Graph (0, 0)][DBLP]
   VTS, 2005, pp:418-423 [Conf]
   
7. Loganathan Lingappan, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha, Srimat T. Chakradhar
   Test-Volume Reduction in Systems-on-a-Chip Using Heterogeneous and Multilevel Compression Techniques. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:10, pp:2193-2206 [Journal]
   
8. Loganathan Lingappan, Srivaths Ravi, Niraj K. Jha
   Satisfiability-based test generation for nonseparable RTL controller-datapath circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. on CAD of Integrated Circuits and Systems, 2006, v:25, n:3, pp:544-557 [Journal]
   
9. Pallav Gupta, Niraj K. Jha, Loganathan Lingappan
   A Test Generation Framework for Quantum Cellular Automata Circuits. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2007, v:15, n:1, pp:24-36 [Journal]
   
10. Loganathan Lingappan, Niraj K. Jha
    Satisfiability-Based Automatic Test Program Generation and Design for Testability for Microprocessors. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:5, pp:518-530 [Journal]