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Jean Oudinot:
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- B. Hecker, M. Chavassieux, M. Laflutte, E. Beguin, L. Lagasse, Jean Oudinot
VHDL-AMS Library Development for Pacemaker Applications. [Citation Graph (0, 0)][DBLP] DATE, 2004, pp:338-341 [Conf]
- Jean Oudinot, Serge Scotti, Jean Ravatin, Audrey Le-clercq, Jacky Lebrun
Full Transceiver Circuit Simulation using VHDL-AMS. [Citation Graph (0, 0)][DBLP] ESM, 2002, pp:642-652 [Conf]
- Benjamin Nicolle, William Tatinian, Jean Oudinot, Gilles Jacquemod
Hierarchical Modeling of a Fractional Phase Locked Loop. [Citation Graph (0, 0)][DBLP] PATMOS, 2006, pp:450-457 [Conf]
- Jean Oudinot
The Most Complete Mixed-Signal Simulation Solution with ADVance MS. [Citation Graph (0, 0)][DBLP] PATMOS, 2003, pp:193- [Conf]
- Jean Oudinot
Top Verification of Low Power System with "Checkerboard" Approach. [Citation Graph (0, 0)][DBLP] PATMOS, 2006, pp:672- [Conf]
Application of Bottom-Up Methodology to RTW VCO. [Citation Graph (, )][DBLP]
SoC modelling for virtual prototyping with VHDL-AMS. [Citation Graph (, )][DBLP]
Micromotor Simulation with VHDL-AMS. [Citation Graph (, )][DBLP]
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