|
Search the dblp DataBase
Oliver Wahlen:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. [Citation Graph (0, 0)][DBLP] DATE, 2004, pp:1276-1283 [Conf]
- Andreas Hoffmann, Oliver Schliebusch, Achim Nohl, Gunnar Braun, Oliver Wahlen, Heinrich Meyr
A Methodology for the Design of Application Specific Instruction Set Processors (ASIP) using the Machine Description Language LISA. [Citation Graph (0, 0)][DBLP] ICCAD, 2001, pp:625-630 [Conf]
- Oliver Wahlen, Tilman Glökler, Achim Nohl, Andreas Hoffmann, Rainer Leupers, Heinrich Meyr
Application specific compiler/architecture codesign: a case study. [Citation Graph (0, 0)][DBLP] LCTES-SCOPES, 2002, pp:185-193 [Conf]
- Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie
Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models. [Citation Graph (0, 0)][DBLP] SCOPES, 2003, pp:167-181 [Conf]
- Oliver Wahlen, Manuel Hohenauer, Rainer Leupers, Heinrich Meyr
Instruction Scheduler Generation for Retargetable Compilation. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2003, v:20, n:1, pp:34-41 [Journal]
- Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr
A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 2001, v:20, n:11, pp:1338-1354 [Journal]
Search in 0.003secs, Finished in 0.003secs
|