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Publications of Author

1. Xu Jingnan, João C. Vital, Nuno Horta
   A Skill-based library for retargetable embedded analog cores. [Citation Graph (0, 0)][DBLP]
   DATE, 2001, pp:768-769 [Conf]
   
2. Pedro M. Figueiredo, João C. Vital
   Analysis of the averaging technique in flash ADCs. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2003, pp:849-852 [Conf]
   
3. Pedro M. Figueiredo, João C. Vital
   Termination of averaging networks in flash ADCs. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2004, pp:121-124 [Conf]
   
4. Pedro M. Figueiredo, João C. Vital
   Low kickback noise techniques for CMOS latched comparators. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2004, pp:537-540 [Conf]
   
5. João Goes, João C. Vital, José E. Franca
   Optimum Resolution-per-Stage in High-Speed Pipelined A/D Converters Using Self-Calibration. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1995, pp:525-528 [Conf]
   
6. João C. Vital, José E. Franca
   A Concurrent Two-step Flash Analogue-to-digital Converter Architecture. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1993, pp:1196-1199 [Conf]
   
7. João C. Vital, José E. Franca, Nuno S. Silva
   Fully-digital Testability of a High-speed Conversion System. [Citation Graph (0, 0)][DBLP]
   ISCAS, 1993, pp:1595-1598 [Conf]
   
8. Jorge Guilherme, Pedro M. Figueiredo, P. Azevedo, G. Minderico, A. Leal, João C. Vital, José E. Franca
   A pipeline 15-b 10-Msample/s analog-to-digital converter for ADSL applications. [Citation Graph (0, 0)][DBLP]
   ISCAS (1), 2001, pp:396-399 [Conf]
   
9. João C. Vital, José E. Franca
   High-Speed A/D-D/A Conversion System with Flexible Testing Capabilities. [Citation Graph (0, 0)][DBLP]
   VLSI Design, 1993, pp:357-362 [Conf]