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Heon-Mo Koo :
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Heon-Mo Koo , Prabhat Mishra Functional test generation using property decompositions for validation of pipelined processors. [Citation Graph (0, 0)][DBLP ] DATE, 2006, pp:1240-1245 [Conf ] Heon-Mo Koo , Prabhat Mishra Test generation using SAT-based bounded model checking for validation of pipelined processors. [Citation Graph (0, 0)][DBLP ] ACM Great Lakes Symposium on VLSI, 2006, pp:362-365 [Conf ] Heon-Mo Koo , Prabhat Mishra , Jayanta Bhadra , Magdy S. Abadir Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study. [Citation Graph (0, 0)][DBLP ] MTV, 2006, pp:33-36 [Conf ] Prabhat Mishra , Heon-Mo Koo , Zhuo Huang Language-driven Validation of Pipelined Processors using Satisfiability Solvers. [Citation Graph (0, 0)][DBLP ] MTV, 2005, pp:119-126 [Conf ] Specification-based compaction of directed tests for functional validation of pipelined processors. [Citation Graph (, )][DBLP ] Search in 0.002secs, Finished in 0.002secs