The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Yu-Chung Lin: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chih-Hung Lee, Yu-Chung Lin, Wen-Yu Fu, Chun-Chiao Chang, Tsai-Ming Hsieh
    A New Formulation for SOC Floorplan Area Minimization Problem. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:1100- [Conf]
  2. Yu-Chung Lin, Su-Feng Tseng, Tsai-Ming Hsieh
    Cost minimization of partitioned circuits with complex resource constraints in FPGAs (poster abstract). [Citation Graph (0, 0)][DBLP]
    FPGA, 2000, pp:217- [Conf]
  3. Po-Xun Chiu, Yu-Chung Lin, Yi-Ling Hsieh, Tsai-Ming Hsieh
    Low power driven re-synthesis algorithm for heterogeneous FPGA under delay constraint. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2001, pp:519-522 [Conf]
  4. Chih-Hung Lee, Yu-Chung Lin, Hsin-Hsiung Huang, Tsai-Ming Hsieh
    Structural Decomposition with Functional Considerations for Low Power. [Citation Graph (0, 0)][DBLP]
    ISQED, 2002, pp:464-469 [Conf]
  5. Chung-Hsien Wu, Ze-Jing Chuang, Yu-Chung Lin
    Emotion recognition from text using semantic labels and separable mixture models. [Citation Graph (0, 0)][DBLP]
    ACM Trans. Asian Lang. Inf. Process., 2006, v:5, n:2, pp:165-183 [Journal]

Search in 0.001secs, Finished in 0.001secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002