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Christos-Savvas Bouganis: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Yang Liu, Christos-Savvas Bouganis, Peter Y. K. Cheung, Philip Heng Wai Leong, Stephen J. Motley
    Hardware efficient architectures for Eigenvalue computation. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:953-958 [Conf]
  2. Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung
    A Novel 2D Filter Design Methodology for Heterogeneous Devices. [Citation Graph (0, 0)][DBLP]
    FCCM, 2005, pp:13-22 [Conf]
  3. Christos-Savvas Bouganis, Peter Y. K. Cheung, George A. Constantinides
    Heterogeneity Exploration for Multiple 2D Filter Designs. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:263-268 [Conf]
  4. Christos-Savvas Bouganis, Peter Y. K. Cheung, Jeffrey Ng, Anil A. Bharath
    A Steerable Complex Wavelet Construction and Its Implementation on FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2004, pp:394-403 [Conf]
  5. Iosifina Pournara, Christos-Savvas Bouganis, George A. Constantinides
    FPGA-Accelerated Reconstruction of Gene Regulatory Networks. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:323-328 [Conf]
  6. Christos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung
    A novel 2D filter design methodology. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:532-535 [Conf]
  7. Christos-Savvas Bouganis, Mike Brookes
    Multiple Light Source Detection. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Pattern Anal. Mach. Intell., 2004, v:26, n:4, pp:509-514 [Journal]
  8. Suhaib A. Fahmy, Christos-Savvas Bouganis, Peter Y. K. Cheung, Wayne Luk
    Efficient Realtime FPGA Implementation of the Trace Transform. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]
  9. Christos-Savvas Bouganis, Peter Y. K. Cheung, Li Zhaoping
    FPGA-Accelerated Pre-Attentive Segmentation in Primary Visual Cortex. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-6 [Conf]
  10. Yang Liu, Christos-Savvas Bouganis, Peter Y. K. Cheung
    A Spatiotemporal Saliency Framework. [Citation Graph (0, 0)][DBLP]
    ICIP, 2006, pp:437-440 [Conf]

  11. Efficient Mapping of Dimensionality Reduction Designs onto Heterogeneous FPGAs. [Citation Graph (, )][DBLP]


  12. Efficient mapping of a Kalman filter into an FPGA using Taylor Expansion. [Citation Graph (, )][DBLP]


  13. Efficient FPGA mapping of Gilbert's algorithm for SVM training on large-scale classification problems. [Citation Graph (, )][DBLP]


  14. Real-time image super resolution using an FPGA. [Citation Graph (, )][DBLP]


  15. Video enhancement on an adaptive image sensor. [Citation Graph (, )][DBLP]


  16. A sensor-based approach to linear blur identification for real-time video enhancement. [Citation Graph (, )][DBLP]


  17. FPGA-based Real-time Super-Resolution on an Adaptive Image Sensor. [Citation Graph (, )][DBLP]


  18. Multivariate Gaussian Random Number Generator Targeting Specific Resource Utilization in an FPGA. [Citation Graph (, )][DBLP]


  19. Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator. [Citation Graph (, )][DBLP]


  20. Design of a Financial Application Driven Multivariate Gaussian Random Number Generator for an FPGA. [Citation Graph (, )][DBLP]


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