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Publications of Author

1. Nikolaos D. Liveris, Nikolaos D. Zervas, Dimitrios Soudris, Constantinos E. Goutis
   A Code Transformation-Based Methodology for Improving I-Cache Performance of DSP Applications. [Citation Graph (0, 0)][DBLP]
   DATE, 2002, pp:977-983 [Conf]
   
2. Yiannis Andreopoulos, Nikolaos D. Zervas, Gauthier Lafruit, Peter Schelkens, Thanos Stouraitis, Costas E. Goutis, Jan Cornelis
   A local wavelet transform implementation versus an optimal row-column algorithm for the 2D multilevel decomposition. [Citation Graph (0, 0)][DBLP]
   ICIP (3), 2001, pp:330-333 [Conf]
   
3. Nikolaos Kavvadias, Alexander Chatzigeorgiou, Nikolaos D. Zervas, Spiridon Nikolaidis
   Memory hierarchy exploration for low power architectures in embedded multimedia applications. [Citation Graph (0, 0)][DBLP]
   ICIP (3), 2001, pp:326-329 [Conf]
   
4. Nikolas Kroupis, Minas Dasygenis, Antonios Argyriou, Konstantinos Tatas, Dimitrios Soudris, Antonios Thanailakis, Nikolaos D. Zervas, Constantinos E. Goutis
   Power, performance and area exploration of block matching algorithms mapped on programmable processors. [Citation Graph (0, 0)][DBLP]
   ICIP (3), 2001, pp:728-731 [Conf]
   
5. Nikolaos D. Zervas, I. Tagopoulos, Vassilis Spiliotopoulos, Giorgos P. Anagnostopoulos, Dimitrios Soudris, Constantinos E. Goutis
   Performance comparison of DWT scheduling alternatives on programmable platforms. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2001, pp:761-764 [Conf]
   
6. Nikolaos D. Zervas, Kostas Masselos, Odysseas G. Koufopavlou, Constantinos E. Goutis
   Power exploration of multimedia applications realized on embedded cores. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 1999, pp:378-381 [Conf]
   
7. Konstantinos Tatas, Antonios Argyriou, Minas Dasygenis, Dimitrios Soudris, Nikolaos D. Zervas
   Memory Hierarchy Optimization of Multimedia Applications on Programmable Embedded Cores 1. [Citation Graph (0, 0)][DBLP]
   ISQED, 2001, pp:456-461 [Conf]
   
8. George Theodoridis, S. Theoharis, Nikolaos D. Zervas, Constantinos E. Goutis
   Accurate Power Estimation of Logic Structures Based on Timed Boolean Functions. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2000, pp:76-87 [Conf]
   
9. Nikolaos D. Zervas, G. Pagkless, Minas Dasygenis, Dimitrios Soudris
   Performance and Power Comparative Study of Discrete Wavelet Transform on Programmable Processors. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2002, pp:323-331 [Conf]
   
10. Nikolaos D. Zervas, S. Theoharis, Athanasios Kakarountas, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
    Reducing Power Consumption through Dynamic Frequency Scaling for a Class of Digital Receivers. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2000, pp:47-55 [Conf]
    
11. Dimitrios Soudris, Nikolaos D. Zervas, Antonios Argyriou, Minas Dasygenis, Konstantinos Tatas, Constantinos E. Goutis, Adonios Thanailakis
    Data-Reuse and Parallel Embedded Architectures for Low-Power, Real-Time Multimedia Applications. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2000, pp:243-254 [Conf]
    
12. Nikolaos D. Zervas, Giorgos P. Anagnostopoulos, Vassilis Spiliotopoulos, Yiannis Andreopoulos, Costas E. Goutis
    Evaluation of design alternatives for the 2-D-discrete wavelet transform. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Circuits Syst. Video Techn., 2001, v:11, n:12, pp:1246-1262 [Journal]
    
13. Nikolaos D. Zervas, George Theodoridis, Dimitrios Soudris
    Behavioral-level event-driven power management for DECT digital receivers. [Citation Graph (0, 0)][DBLP]
    Microelectronics Journal, 2005, v:36, n:2, pp:163-172 [Journal]
    
14. Athanasios Kakarountas, Nikolaos D. Zervas, George Theodoridis, Haralambos Michail, Dimitrios Soudris
    Power Management Through Dynamic Frequency Scaling for Low and Medium Bit-Rate Digital Receivers. [Citation Graph (0, 0)][DBLP]
    J. Low Power Electronics, 2006, v:2, n:3, pp:356-364 [Journal]
    
15. Nikolas Kroupis, Nikolaos D. Zervas, Minas Dasygenis, Konstantinos Tatas, Antonios Argyriou, Dimitrios Soudris, Antonios Thanailakis
    Behavioral-Level Performance and Power Exploration of Data-Intensive Applications Mapped on Programmable Processors. [Citation Graph (0, 0)][DBLP]
    VLSI Signal Processing, 2006, v:44, n:1-2, pp:153-171 [Journal]