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Mario García-Valderas:
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Publications of Author
- Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes
Techniques for Fast Transient Fault Grading Based on Autonomous Emulation. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:308-309 [Conf]
- Mario García-Valderas, Marta Portela-García, Celia López-Ongil, Luis Entrena-Arrontes
An Extension of Transient Fault Emulation Techniques to Circuits with Embedded Memories. [Citation Graph (0, 0)][DBLP] DDECS, 2006, pp:218-219 [Conf]
- Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes
An Autonomous FPGA-based Emulation System for Fast Fault Tolerant Evaluation. [Citation Graph (0, 0)][DBLP] FPL, 2005, pp:397-402 [Conf]
- Michael G. Lorenz, Luis Mengibar, Mario García-Valderas, Luis Entrena
Power Consumption Reduction Through Dynamic Reconfiguration. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:751-760 [Conf]
- M. G. Valderas, Eduardo de la Torre, F. Ariza, Teresa Riesgo
Hardware and Software Debugging of FPGA Based Microprocessor Systems Through Debug Logic Insertion. [Citation Graph (0, 0)][DBLP] FPL, 2004, pp:1057-1061 [Conf]
- Mario García-Valderas, Celia López-Ongil, Marta Portela-García, Luis Entrena
Transient Fault Emulation of Hardened Circuits in FPGA Platforms. [Citation Graph (0, 0)][DBLP] IOLTS, 2004, pp:109-114 [Conf]
- Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes
Autonomous Transient Fault Emulation on FPGAs for Accelerating Fault Grading. [Citation Graph (0, 0)][DBLP] IOLTS, 2005, pp:43-48 [Conf]
- Mario García-Valderas, Marta Portela-García, Celia López-Ongil, Luis Entrena
Emulation-based Fault Injection in Circuits with Embedded Memories. [Citation Graph (0, 0)][DBLP] IOLTS, 2006, pp:183-184 [Conf]
- Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena
A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors. [Citation Graph (0, 0)][DBLP] IOLTS, 2007, pp:101-106 [Conf]
- Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena-Arrontes
Techniques for Fast Transient Fault Grading Based on Autonomous Emulation [Citation Graph (0, 0)][DBLP] CoRR, 2007, v:0, n:, pp:- [Journal]
SET Emulation Under a Quantized Delay Model. [Citation Graph (, )][DBLP]
Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard. [Citation Graph (, )][DBLP]
Pseudo-random number generation applied to robust modern cryptography: A new technique for block ciphers. [Citation Graph (, )][DBLP]
In-depth analysis of digital circuits against soft errors for selective hardening. [Citation Graph (, )][DBLP]
Briefing power/reliability optimization in embedded software design. [Citation Graph (, )][DBLP]
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