|
Search the dblp DataBase
Arindam Mallik:
[Publications]
[Author Rank by year]
[Co-authors]
[Prefers]
[Cites]
[Cited by]
Publications of Author
- Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
Smart bit-width allocation for low power optimization in a systemc based ASIC design environment. [Citation Graph (0, 0)][DBLP] DATE, 2006, pp:618-623 [Conf]
- Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, Yehea I. Ismail
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files. [Citation Graph (0, 0)][DBLP] DSN, 2005, pp:770-779 [Conf]
- Gokhan Memik, Mahmut T. Kandemir, Arindam Mallik
Load elimination for low-power embedded processors. [Citation Graph (0, 0)][DBLP] ACM Great Lakes Symposium on VLSI, 2005, pp:282-285 [Conf]
- Arindam Mallik, Matthew C. Wildrick, Gokhan Memik
Design and implementation of correlating caches. [Citation Graph (0, 0)][DBLP] ISLPED, 2004, pp:58-61 [Conf]
- Arindam Mallik, Gokhan Memik
A Case for Clumsy Packet Processors. [Citation Graph (0, 0)][DBLP] MICRO, 2004, pp:147-156 [Conf]
- Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick
Power reduction through measurement and modeling of users and CPUs: summary. [Citation Graph (0, 0)][DBLP] SIGMETRICS, 2007, pp:363-364 [Conf]
- Arindam Mallik, Gokhan Memik
Low Power Correlating Caches for Network Processors. [Citation Graph (0, 0)][DBLP] J. Low Power Electronics, 2005, v:1, n:2, pp:108-118 [Journal]
PICSEL: measuring user-perceived performance to control dynamic frequency scaling. [Citation Graph (, )][DBLP]
A framework for automatic parallelization, static and dynamic memory optimization in MPSoC platforms. [Citation Graph (, )][DBLP]
Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction. [Citation Graph (, )][DBLP]
User- and process-driven dynamic voltage and frequency scaling. [Citation Graph (, )][DBLP]
Variable latency caches for nanoscale processor. [Citation Graph (, )][DBLP]
Automated task distribution in multicore network processors using statistical analysis. [Citation Graph (, )][DBLP]
The user in experimental computer systems research. [Citation Graph (, )][DBLP]
User-Driven Frequency Scaling. [Citation Graph (, )][DBLP]
Search in 0.001secs, Finished in 0.002secs
|