Search the dblp DataBase

Publications of Author

1. Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa
   Power/performance hardware optimization for synchronization intensive applications in MPSoCs. [Citation Graph (0, 0)][DBLP]
   DATE, 2006, pp:606-611 [Conf]
   
2. Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo
   Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip. [Citation Graph (0, 0)][DBLP]
   DATE, 2005, pp:804-805 [Conf]
   
3. Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa
   Efficient Synchronization for Embedded On-Chip Multiprocessors. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. VLSI Syst., 2006, v:14, n:10, pp:1049-1062 [Journal]
   
4. Daniele Paolo Scarpazza, Oreste Villa, Fabrizio Petrini
   Peak-Performance DFA-based String Matching on the Cell Processor. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2007, pp:1-8 [Conf]
   
5. Oreste Villa, Daniele Paolo Scarpazza, Fabrizio Petrini, Juan Fernández Peinador
   Challenges in Mapping Graph Exploration Algorithms on Advanced Multi-core Processors. [Citation Graph (0, 0)][DBLP]
   IPDPS, 2007, pp:1-10 [Conf]
   
6. Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa
   Exploration of Distributed Shared Memory Architectures for NoC-based Multiprocessors. [Citation Graph (0, 0)][DBLP]
   ICSAMOS, 2006, pp:144-151 [Conf]
   
7. Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo
   Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip [Citation Graph (0, 0)][DBLP]
   CoRR, 2007, v:0, n:, pp:- [Journal]
   
8. Matteo Monchiero, Gianluca Palermo, Cristina Silvano, Oreste Villa
   Exploration of distributed shared memory architectures for NoC-based multiprocessors. [Citation Graph (0, 0)][DBLP]
   Journal of Systems Architecture, 2007, v:53, n:10, pp:719-732 [Journal]
   
9. 
   Efficiency and scalability of barrier synchronization on NoC based many-core architectures. [Citation Graph (, )][DBLP]
   
   
10. 
    Efficient pattern matching on GPUs for intrusion detection systems. [Citation Graph (, )][DBLP]
    
    
11. 
    Exact multi-pattern string matching on the cell/b.e. processor. [Citation Graph (, )][DBLP]
    
    
12. 
    Scalable transparent checkpoint-restart of global address space applications on virtual machines over infiniband. [Citation Graph (, )][DBLP]
    
    
13. 
    Transparent system-level migration of PGAS applications using Xen on InfiniBand. [Citation Graph (, )][DBLP]
    
    
14. 
    A Modular Approach to Model Heterogeneous MPSoC at Cycle Level. [Citation Graph (, )][DBLP]
    
    
15. 
    High-speed string searching against large dictionaries on the Cell/B.E. Processor. [Citation Graph (, )][DBLP]
    
    
16. 
    Input-independent, scalable and fast string matching on the Cray XMT. [Citation Graph (, )][DBLP]
    
    
17. 
    Accelerating Real-Time String Searching with Multicore Processors. [Citation Graph (, )][DBLP]