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V. de Armas: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez
    A Cell and Macrocell Compiler for GaAs VLSI Full-Custom Design. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:947-948 [Conf]
  2. Juan A. Montiel-Nelson, Saeid Nooshabadi, V. de Armas, Roberto Sarmiento, Antonio Núñez
    High Speed GaAs Subsystem Design using Feed Through Logic. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:509-0 [Conf]
  3. Sebastián López, F. Tobajas, A. Villar, V. de Armas, José Francisco López, Roberto Sarmiento
    Low cost efficient architecture for H.264 motion estimation. [Citation Graph (0, 0)][DBLP]
    ISCAS (1), 2005, pp:412-415 [Conf]
  4. Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi
    A compact layout technique to minimize high frequency switching effects in high speed circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:96-99 [Conf]
  5. Juan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez
    A Compact Layout Technique for Reducing Switching Current Effects in High Speed Circuits. [Citation Graph (0, 0)][DBLP]
    ISQED, 2001, pp:223-0 [Conf]
  6. Roberto Sarmiento, V. de Armas, José Francisco López, Juan A. Montiel-Nelson, Antonio Núñez
    A CORDIC processor for FFT computation and its implementation using gallium arsenide technology. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1998, v:6, n:1, pp:18-30 [Journal]

  7. GMDS: Hardware implementation of novel real output queuing architecture. [Citation Graph (, )][DBLP]


  8. Experimental gigabit multidrop serial backplane for high speed digital systems. [Citation Graph (, )][DBLP]


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