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Chittaranjan A. Mandal: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Arijit Mondal, P. P. Chakrabarti, Chittaranjan A. Mandal
    A New Approach to Timing Analysis Using Event Propagation and Temporal Logic. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1198-1203 [Conf]
  2. Soumya Pandit, Sougata Kar, Chittaranjan A. Mandal, Amit Patra
    High level synthesis of higher order continuous time state variable filters with minimum sensitivity and hardware count. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:1203-1204 [Conf]
  3. Soumya Pandit, Chittaranjan A. Mandal, Amit Patra
    A formal approach for high level synthesis of linear analog systems. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2006, pp:345-348 [Conf]
  4. Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Mandal, Chris Reade
    Hand-in-hand verification of high-level synthesis. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2007, pp:429-434 [Conf]
  5. B. Rajendran, V. Kheterpal, A. Das, J. Majumder, Chittaranjan A. Mandal, P. P. Chakrabarti
    Timing analysis of tree-like RLC circuits. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:838-841 [Conf]
  6. Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sarkar, S. R. Pentakota, Chris Reade
    A Formal Verification Method of Scheduling in High-level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISQED, 2006, pp:71-78 [Conf]
  7. Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sarkar, S. R. Pentakota, Chris Reade
    Verification of Scheduling in High-level Synthesis. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:141-146 [Conf]
  8. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    Allocation and Binding in Data Path Synthesis Using a Genetic Algorithm Approach. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1996, pp:122-125 [Conf]
  9. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    Design Space Exploration for Data Path Synthesis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1997, pp:166-173 [Conf]
  10. Chittaranjan A. Mandal, R. M. Zimmer
    A Genetic Algorithm for the Synthesis of Structured Data Paths. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2000, pp:206-211 [Conf]
  11. Amit Kumar Mandal, Chittaranjan A. Mandal, Chris Reade
    A System for Automatic Evaluation of Programs for Correctness and Performance. [Citation Graph (0, 0)][DBLP]
    WEBIST (2), 2006, pp:196-203 [Conf]
  12. Chittaranjan A. Mandal, Chris Reade
    Animating Algorithms over the Web. [Citation Graph (0, 0)][DBLP]
    WEBIST (2), 2006, pp:403-407 [Conf]
  13. Chandan Karfa, Chittaranjan A. Mandal, Dipankar Sarkar, Chris Reade
    Register Sharing Verification During Data-Path Synthesis. [Citation Graph (0, 0)][DBLP]
    ICCTA, 2007, pp:135-140 [Conf]
  14. Amit Mandal, Chittaranjan A. Mandal, Chris Reade
    A System for Automatic Evaluation of Programs for Correctness and Performance. [Citation Graph (0, 0)][DBLP]
    WEBIST (Selected Papers), 2006, pp:367-380 [Conf]
  15. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    A design space exploration scheme for data-path synthesis. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 1999, v:7, n:3, pp:331-338 [Journal]
  16. Chittaranjan A. Mandal, P. P. Chakrabarti, Sujoy Ghose
    GABIND: a GA approach to allocation and binding for the high-level synthesis of data paths. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2000, v:8, n:6, pp:747-750 [Journal]

  17. ClusterHead Rotation via Domatic Partition in Self-Organizing Sensor Networks. [Citation Graph (, )][DBLP]


  18. Location Updates of Mobile Node in Wireless Sensor Networks. [Citation Graph (, )][DBLP]


  19. Automatic Detection of Human Fall in Video. [Citation Graph (, )][DBLP]


  20. Systematic Methodology for High-Level Performance Modeling of Analog Systems. [Citation Graph (, )][DBLP]


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