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Pablo Robelly: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Pablo Robelly, Hendrik Seidel, K. C. Chen, Gerhard Fettweis
    Energy efficiency vs. programmability trade-off: architectures and design principles. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:587-592 [Conf]
  2. Emil Matús, Gordon Cichon, Hendrik Seidel, Pablo Robelly, T. Limberg, Gerhard Fettweis
    A Compiler-friendly and Low-power DSP architecture. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (1), 2005, pp:459- [Conf]
  3. Gordon Cichon, Pablo Robelly, Hendrik Seidel, Marcus Bronzel, Gerhard Fettweis
    Compiler Scheduling for STA-Processors. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:45-50 [Conf]
  4. Pablo Robelly, Gordon Cichon, Hendrik Seidel, Gerhard Fettweis
    Automatic Code Generation for SIMD DSP Architectures: An Algebraic Approach. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:372-375 [Conf]
  5. Hendrik Seidel, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis
    Hardware / Software Co-Design of a SIMD-DSP-Based DVB-T Receiver. [Citation Graph (0, 0)][DBLP]
    PARELEC, 2004, pp:221-225 [Conf]
  6. Hendrik Seidel, Emil Matús, Gordon Cichon, Pablo Robelly, Marcus Bronzel, Gerhard Fettweis
    Generated DSP Cores for Implementation of an OFDM Communication System. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:353-362 [Conf]
  7. Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil Matús, Marcus Bronzel, Gerhard Fettweis
    Synchronous Transfer Architecture (STA). [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:343-352 [Conf]
  8. Pablo Robelly, A. Lehmann, Gerhard Fettweis
    Two-Dimensional Fast Cosine Transform for Vector-STA Architectures. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:62-71 [Conf]

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