The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Rosa Rodríguez-Montañés: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Rosa Rodríguez-Montañés, Joan Figueras
    Estimation of the Defective IDDQ Caused by Shorts in Deep-Submicron CMOS ICs. [Citation Graph (0, 0)][DBLP]
    DATE, 1998, pp:490-494 [Conf]
  2. L. Balado, E. Lupon, L. García, Rosa Rodríguez-Montañés, Joan Figueras
    Lissajous Based Mixed-Signal Testing for N-Observable Signals. [Citation Graph (0, 0)][DBLP]
    DDECS, 2006, pp:125-130 [Conf]
  3. Doru P. Munteanu, Víctor Suñé, Rosa Rodríguez-Montañés, Juan A. Carrasco
    A Combinatorial Method for the Evaluation of Yield of Fault-Tolerant Systems-on-Chip. [Citation Graph (0, 0)][DBLP]
    DSN, 2003, pp:563-572 [Conf]
  4. Rosa Rodríguez-Montañés, Joan Figueras
    Analysis of Bridging Defects in Sequential CMOS Circuits and their Current Testability. [Citation Graph (0, 0)][DBLP]
    EDAC-ETC-EUROASIC, 1994, pp:356-360 [Conf]
  5. Rosa Rodríguez-Montañés, D. Muñoz, L. Balado, Joan Figueras
    Analog Switches in Programmable Analog Devices: Quiescent Defective Behaviours. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:99-103 [Conf]
  6. Rosa Rodríguez-Montañés, Joan Figueras, Eric Bruls
    Bridging Defects Resistance Measurements in a CMOS Process. [Citation Graph (0, 0)][DBLP]
    ITC, 1992, pp:892-899 [Conf]
  7. Rosa Rodríguez-Montañés, J. A. Segura, Víctor H. Champac, Joan Figueras, J. A. Rubio
    Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS. [Citation Graph (0, 0)][DBLP]
    ITC, 1991, pp:510-519 [Conf]
  8. Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira, Salvador Manich, Rosa Rodríguez-Montañés, Joan Figueras
    RTL Level Preparation of High-Quality/Low-Energy/Low-Power BIST. [Citation Graph (0, 0)][DBLP]
    ITC, 2002, pp:814-823 [Conf]
  9. José Pineda de Gyvez, Rosa Rodríguez-Montañés
    Threshold Voltage Mismatch (DeltaVT) Fault Modeling. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:145-150 [Conf]
  10. Salvador Manich, L. García, L. Balado, E. Lupon, Josep Rius, Rosa Rodríguez-Montañés, Joan Figueras
    BIST Technique by Equally Spaced Test Vector Sequences. [Citation Graph (0, 0)][DBLP]
    VTS, 2004, pp:206-216 [Conf]
  11. Rosa Rodríguez-Montañés, Joan Figueras
    Bridges in sequential CMOS circuits: current-voltage signatur. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:68-73 [Conf]
  12. D. Arumi, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi
    Diagnosis of Bridging Defects Based on Current Signatures at Low Power Supply Voltages. [Citation Graph (0, 0)][DBLP]
    VTS, 2007, pp:145-150 [Conf]
  13. Rosa Rodríguez-Montañés, D. Arumi, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman, Maurice Lousberg, Ananta K. Majhi
    Diagnosis of Full Open Defects in Interconnecting Lines. [Citation Graph (0, 0)][DBLP]
    VTS, 2007, pp:158-166 [Conf]
  14. Rosa Rodríguez-Montañés, Paul Volf, José Pineda de Gyvez
    Resistance Characterization for Weak Open Defects. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:5, pp:18-26 [Journal]
  15. Antoni Ferré, Eugeni Isern, Josep Rius, Rosa Rodríguez-Montañés, Joan Figueras
    IDDQ testing: state of the art and future trends. [Citation Graph (0, 0)][DBLP]
    Integration, 1998, v:26, n:1-2, pp:167-196 [Journal]

  16. Full Open Defects in Nanometric CMOS. [Citation Graph (, )][DBLP]


  17. Diagnosis of full open defects in interconnect lines with fan-out. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002