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Pascal Benoit: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gilles Sassatelli, Lionel Torres, Pascal Benoit, Thierry Gil, Camille Diou, Gaston Cambon, Jérôme Galy
    Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2002, pp:553-558 [Conf]
  2. Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon
    Dynamic hardware multiplexing for coarse grain reconfigurable architectures. [Citation Graph (0, 0)][DBLP]
    FPGA, 2005, pp:270- [Conf]
  3. Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon
    Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:703-706 [Conf]
  4. Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny
    A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:722-732 [Conf]
  5. Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy
    Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2001, pp:63-74 [Conf]
  6. Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon
    Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:176- [Conf]
  7. Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon
    Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2005, pp:- [Conf]
  8. Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker
    Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2006, pp:251-256 [Conf]
  9. Nicolas Saint-Jean, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
    HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:21-28 [Conf]
  10. Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon
    Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2004, pp:128-137 [Conf]
  11. Nicolas Saint-Jean, Camille Jalier, Gilles Sassatelli, Pascal Benoit, Lionel Torres, Michel Robert
    HS Scale: A run-time adaptable MP-SoC architecture. [Citation Graph (0, 0)][DBLP]
    ReCoSoC, 2007, pp:39-46 [Conf]
  12. Nicolas Saint-Jean, Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert
    Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems. [Citation Graph (0, 0)][DBLP]
    ICSAMOS, 2007, pp:88-95 [Conf]

  13. Dynamic and distributed frequency assignment for energy and latency constrained MP-SoC. [Citation Graph (, )][DBLP]


  14. Heterogeneous vs homogeneous MPSoC approaches for a Mobile LTE modem. [Citation Graph (, )][DBLP]


  15. Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs. [Citation Graph (, )][DBLP]


  16. Convergence analysis of run-time distributed optimization on adaptive systems using game theory. [Citation Graph (, )][DBLP]


  17. Bio-inspiration helps computers: A new machine. [Citation Graph (, )][DBLP]


  18. MPI-Based Adaptive Task Migration Support on the HS-Scale System. [Citation Graph (, )][DBLP]


  19. Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using Game Theory. [Citation Graph (, )][DBLP]


  20. Game-Theoretic Approach for Temperature-Aware Frequency Assignment with Task Synchronization on MP-SoC. [Citation Graph (, )][DBLP]


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