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Jürgen Schnerr:
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- Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs. [Citation Graph (0, 0)][DBLP] DATE, 2005, pp:792-797 [Conf]
- Jürgen Schnerr, Gunter Haug, Wolfgang Rosenstiel
Instruction Set Emulation for Rapid Prototyping of SoCs . [Citation Graph (0, 0)][DBLP] DATE, 2003, pp:10562-10569 [Conf]
- Jürgen Schnerr, Oliver Bringmann, Wolfgang Rosenstiel
Cycle Accurate Binary Translation for Simulation Acceleration in Rapid Prototyping of SoCs [Citation Graph (0, 0)][DBLP] CoRR, 2007, v:0, n:, pp:- [Journal]
ESL power analysis of embedded processors for temperature and reliability estimations. [Citation Graph (, )][DBLP]
High-performance timing simulation of embedded software. [Citation Graph (, )][DBLP]
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