The SCEAS System
Navigation Menu
Introduction
Collection Based
Clustering
Ranking
Paper Based
Journals
Conferences
DB Status
Statistics
Search

Search the dblp DataBase

Title:
Author:
Tomi Westerlund: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Tiberiu Seceleanu, Tomi Westerlund
    Aspects of Formal and Graphical Design of a Bus System. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:396-403 [Conf]
  2. Tomi Westerlund, Juha Plosila
    Time Aware Modelling and Analysis of Multiclocked VLSI Systems. [Citation Graph (0, 0)][DBLP]
    ICFEM, 2006, pp:737-756 [Conf]
  3. Tomi Westerlund, Juha Plosila
    Formal Specification of a Protocol Processor. [Citation Graph (0, 0)][DBLP]
    SAMOS, 2005, pp:122-131 [Conf]
  4. Tomi Westerlund, Juha Plosila
    Time Aware System Refinement. [Citation Graph (0, 0)][DBLP]
    Electr. Notes Theor. Comput. Sci., 2007, v:187, n:, pp:91-106 [Journal]

  5. Rigorous Communication Modelling at Transaction Level With Systemc. [Citation Graph (, )][DBLP]


  6. Power Aware System Refinement. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
Introduction Collection Based Clustering Ranking Paper Based Journals Conferences DB Status Statistics Search
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002