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Balasubramanian Sethuraman: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Balasubramanian Sethuraman, Ranga Vemuri
    optiMap: a tool for automated generation of noc architectures using multi-port routers for FPGAs. [Citation Graph (0, 0)][DBLP]
    DATE, 2006, pp:947-952 [Conf]
  2. Jawad Khan, Balasubramanian Sethuraman, Ranga Vemuri
    A Power-Performance Trade-off Methodology for Portable Reconfigurable Platforms. [Citation Graph (0, 0)][DBLP]
    ERSA, 2004, pp:33-37 [Conf]
  3. Balasubramanian Sethuraman, Prasun Bhattacharya, Jawad Khan, Ranga Vemuri
    LiPaR: A light-weight parallel router for FPGA-based networks-on-chip. [Citation Graph (0, 0)][DBLP]
    ACM Great Lakes Symposium on VLSI, 2005, pp:452-457 [Conf]
  4. Balasubramanian Sethuraman, Ranga Vemuri
    A Force-directed Approach for Fast Generation of Efficient Multi-Port NoC Architectures. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2007, pp:419-426 [Conf]
  5. Balasubramanian Sethuraman
    Novel Methodologies for Performance & Power Efficient Reconfigurable Networks-on-Chip. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-2 [Conf]
  6. Balasubramanian Sethuraman, Ranga Vemuri
    Multi2 Router: A Novel Multi Local Port Router Architecture with Broadcast Facility for FPGA-Based Networks-on-Chip. [Citation Graph (0, 0)][DBLP]
    FPL, 2006, pp:1-4 [Conf]

  7. A methodology for application-specific NoC architecture generation in a dynamic task structure environment. [Citation Graph (, )][DBLP]

  8. Power variations of multi-port routers in an application-specific NoC design : A case study. [Citation Graph (, )][DBLP]

  9. Multicasting based topology generation and core mapping for a power efficient networks-on-chip. [Citation Graph (, )][DBLP]

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