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Luís Guerra e Silva:
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- Luís Guerra e Silva, Luis Miguel Silveira, João P. Marques Silva
Algorithms for Solving Boolean Satisfiability in Combinational Circuits. [Citation Graph (0, 0)][DBLP] DATE, 1999, pp:526-530 [Conf]
- Luís Guerra e Silva, Luis Miguel Silveira
Grid-based statistical timing analysis. [Citation Graph (0, 0)][DBLP] IADIS AC, 2005, pp:73-80 [Conf]
- João P. Marques Silva, Luís Guerra e Silva
Solving Satisfiability in Combinational Circuits. [Citation Graph (0, 0)][DBLP] IEEE Design & Test of Computers, 2003, v:20, n:4, pp:16-21 [Journal]
- Luís Guerra e Silva, João P. Marques Silva, Luis Miguel Silveira, Karem A. Sakallah
Satisfiability models and algorithms for circuit delay computation. [Citation Graph (0, 0)][DBLP] ACM Trans. Design Autom. Electr. Syst., 2002, v:7, n:1, pp:137-158 [Journal]
- Luís Guerra e Silva, Luis Miguel Silveira, Joel R. Phillips
Efficient computation of the worst-delay corner. [Citation Graph (0, 0)][DBLP] DATE, 2007, pp:1617-1622 [Conf]
- Luís Guerra e Silva, Zhenhai Zhu, Joel R. Phillips, L. Miguel Silveira
Variation-Aware, Library Compatible Delay Modeling Strategy. [Citation Graph (0, 0)][DBLP] VLSI-SoC, 2006, pp:122-127 [Conf]
Speedpath analysis under parametric timing models. [Citation Graph (, )][DBLP]
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