The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Sören Moch: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Xun Mao, Mark Bernd Kulaczewski, Heiko Klußmann, Peter Pirsch
    HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing Applications. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:20008-20013 [Conf]
  2. Klaus Herrmann, Sören Moch, Jörg Hilgenstock, Peter Pirsch
    Implementation of a Multiprocessor System with Distributed Embedded DRAM on a Large Area Integrated Circuit. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:105-113 [Conf]
  3. Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Sebastian Flügel, Mark Bernd Kulaczewski, Peter Pirsch
    HiBRID-SoC: a multi-core architecture for image and video applications. [Citation Graph (0, 0)][DBLP]
    ICIP (3), 2003, pp:101-104 [Conf]
  4. Hans-Joachim Stolberg, Mladen Berekovic, Lars Friebe, Sören Moch, Mark Bernd Kulaczewski, Peter Pirsch
    HiBRID-SoC: A Multi-Core System-on-Chip Architecture for Multimedia Signal Processing. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:155-160 [Conf]
  5. Markus Rudack, Michael Redeker, Jörg Hilgenstock, Sören Moch, Jens Castagne
    A Large-Area Integrated Multiprocessor System for Video Applications. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 2002, v:19, n:1, pp:6-17 [Journal]
  6. Mladen Berekovic, Sören Moch, Peter Pirsch
    A scalable, clustered SMT processor for digital signal processing. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2004, v:32, n:3, pp:62-69 [Journal]
  7. Sören Moch, Mladen Berekovic, Hans-Joachim Stolberg, Lars Friebe, Mark Bernd Kulaczewski, A. Dehnhardt, Peter Pirsch
    HIBRID-SOC: a multi-core architecture for image and video applications. [Citation Graph (0, 0)][DBLP]
    SIGARCH Computer Architecture News, 2004, v:32, n:3, pp:55-61 [Journal]

  8. An Enhanced DMA Controller in SIMD Processors for Video Applications. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.002secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002