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Publications of Author

1. Isamu Kajitani, Tsutomu Hoshino, Nobuki Kajihara, Masaya Iwata, Tetsuya Higuchi
   An Evolvable Hardware Chip and Its Application as a Multi-Function Prosthetic Hand Controller. [Citation Graph (0, 0)][DBLP]
   AAAI/IAAI, 1999, pp:182-187 [Conf]
   
2. Hidenori Sakanashi, Mehrdad Salami, Masaya Iwata, Shogo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Tetsuya Higuchi
   Evolvable Hardware Chip for High Precision Printer Image Compression. [Citation Graph (0, 0)][DBLP]
   AAAI/IAAI, 1998, pp:486-491 [Conf]
   
3. Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara
   Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW. [Citation Graph (0, 0)][DBLP]
   FCCM, 2000, pp:281-282 [Conf]
   
4. Tsukasa Yamauchi, Shogo Nakaya, Takeshi Inuo, Nobuki Kajihara
   Arithmetic Operation Oriented Reconfigurable Chip: RHW. [Citation Graph (0, 0)][DBLP]
   FPL, 2001, pp:618-622 [Conf]
   
5. Masaya Iwata, Isamu Kajitani, Yong Liu, Nobuki Kajihara, Tetsuya Higuchi
   Implementation of a Gate-Level Evolvable Hardware Chip. [Citation Graph (0, 0)][DBLP]
   ICES, 2001, pp:38-49 [Conf]
   
6. Isamu Kajitani, Tsutomu Hoshino, Daisuke Nishikawa, Hiroshi Yokoi, Shougo Nakaya, Tsukasa Yamauchi, Takeshi Inuo, Nobuki Kajihara, Masaya Iwata, Didier Keymeulen, Tetsuya Higuchi
   A Gate-Level EHW Chip: Implementing GA Operations and Reconfigurable Hardware on a Single LSI. [Citation Graph (0, 0)][DBLP]
   ICES, 1998, pp:1-12 [Conf]
   
7. Tetsuya Higuchi, Nobuki Kajihara
   Evolvable Hardware Chips for Industrial Applications. [Citation Graph (0, 0)][DBLP]
   Commun. ACM, 1999, v:42, n:4, pp:60-66 [Journal]
   
8. Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani, Xin Yao, Nobuki Kajihara, Masaya Iwata, Tetsuya Higuchi
   The GRD Chip: Genetic Reconfiguration of DSPs for Neural Network Processing. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1999, v:48, n:6, pp:628-639 [Journal]
   
9. Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu
   Real-world applications of analog and digital evolvable hardware . [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Evolutionary Computation, 1999, v:3, n:3, pp:220-235 [Journal]
   
10. 
    SOP: An Adaptive Massively Parallel Computer and its Control-Data-Flow Based Compiling Method. [Citation Graph (, )][DBLP]