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Publications of Author

1. Steffen Tarnick
   Self-Testing Embedded Checkers for Bose-Lin, Bose, and a Class of Borden Codes. [Citation Graph (0, 0)][DBLP]
   DATE, 2003, pp:11162-11163 [Conf]
   
2. Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, Hans-Joachim Wunderlich
   Pattern generation for a deterministic BIST scheme. [Citation Graph (0, 0)][DBLP]
   ICCAD, 1995, pp:88-94 [Conf]
   
3. Steffen Tarnick
   A Design Method for Embedded Self-Testing t-UED and BUED Code Checkers. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2003, pp:43-48 [Conf]
   
4. Steffen Tarnick
   Single-Output Embedded Checkers for Systematic Unordered Codes. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2004, pp:45-51 [Conf]
   
5. Steffen Tarnick
   Embedded Borden 2-UED Code Checkers. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2006, pp:173-175 [Conf]
   
6. Sybille Hellebrand, Steffen Tarnick, Bernard Courtois, Janusz Rajski
   Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers. [Citation Graph (0, 0)][DBLP]
   ITC, 1992, pp:120-129 [Conf]
   
7. Steffen Tarnick, Albrecht P. Stroele
   Embedded self-testing checkers for low-cost arithmetic codes. [Citation Graph (0, 0)][DBLP]
   ITC, 1998, pp:514-523 [Conf]
   
8. Albrecht P. Stroele, Steffen Tarnick
   Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Code. [Citation Graph (0, 0)][DBLP]
   VTS, 1999, pp:361-369 [Conf]
   
9. Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois
   Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. [Citation Graph (0, 0)][DBLP]
   IEEE Trans. Computers, 1995, v:44, n:2, pp:223-233 [Journal]
   
10. S. Kundu, Egor S. Sogomonyan, Michael Gössel, Steffen Tarnick
    Self-Checking Comparator with One Periodic Output. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 1996, v:45, n:3, pp:379-380 [Journal]
    
11. Steffen Tarnick
    Controllable self-checking checkers for conditional concurrent checking. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 1995, v:14, n:5, pp:547-553 [Journal]
    
12. Steffen Tarnick
    Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:285-292 [Conf]
    
13. Steffen Tarnick
    Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:4, pp:391-404 [Journal]
    
14. 
    A Low-Cost Accumulator-Based Test Pattern Generation Architecture. [Citation Graph (, )][DBLP]