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Yi-Shing Chang: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Chandra Tirumurti, Sandip Kundu, Susmita Sur-Kolay, Yi-Shing Chang
    A Modeling Approach for Addressing Power Supply Switching Noise Related Failures of Integrated Circuit. [Citation Graph (0, 0)][DBLP]
    DATE, 2004, pp:1078-1083 [Conf]
  2. Sujit T. Zachariah, Yi-Shing Chang, Sandip Kundu, Chandra Tirumurti
    On Modeling Cross-Talk Faults. [Citation Graph (0, 0)][DBLP]
    DATE, 2003, pp:10490-10495 [Conf]
  3. Abhijit Jas, Yi-Shing Chang, Sreejit Chakravarty
    An Approach to Minimizing Functional Constraints. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:215-226 [Conf]
  4. Thou-Ho Chen, Liang-Gee Chen, Yi-Shing Chang
    Design of Concurrent Error-Detectable VLSI-Based Array Dividers. [Citation Graph (0, 0)][DBLP]
    ICCD, 1992, pp:72-75 [Conf]
  5. Yi-Shing Chang, Sreejit Chakravarty, Hiep Hoang, Nick Thorpe, Khen Wee
    Transition Tests for High Performance Microprocessors. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:29-34 [Conf]
  6. Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
    Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-out. [Citation Graph (0, 0)][DBLP]
    VTS, 2001, pp:358-367 [Conf]
  7. Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
    Test Generation for Maximizing Ground Bounce Considering Circuit Delay. [Citation Graph (0, 0)][DBLP]
    VTS, 2003, pp:151-157 [Conf]
  8. Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
    Analysis of Ground Bounce in Deep Sub-Micron Circuits. [Citation Graph (0, 0)][DBLP]
    VTS, 1997, pp:110-116 [Conf]
  9. Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer
    Test Generation for Ground Bounce in Internal Logic Circuitry. [Citation Graph (0, 0)][DBLP]
    VTS, 1999, pp:95-105 [Conf]
  10. Sreejit Chakravarty, Yi-Shing Chang, Hiep Hoang, Sridhar Jayaraman, Silvio Picano, Cheryl Prunty, Eric W. Savage, Rehan Sheikh, Eric N. Tran, Khen Wee
    Experimental Evaluation of Bridge Patterns for a High Performance Microprocessor. [Citation Graph (0, 0)][DBLP]
    VTS, 2005, pp:337-342 [Conf]
  11. Sandip Kundu, Sujit T. Zachariah, Yi-Shing Chang, Chandra Tirumurti
    On modeling crosstalk faults. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. on CAD of Integrated Circuits and Systems, 2005, v:24, n:12, pp:1909-1915 [Journal]

  12. Efficient Selection of Observation Points for Functional Tests. [Citation Graph (, )][DBLP]


  13. An Industrial Case Study of Sticky Path-Delay Faults. [Citation Graph (, )][DBLP]


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