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Artur Jutman:
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Publications of Author
- Raimund Ubar, Artur Jutman, Zebo Peng
Timing simulation of digital circuits with binary decision diagrams. [Citation Graph (0, 0)][DBLP] DATE, 2001, pp:460-466 [Conf]
- Artur Jutman, Jaan Raik, Raimund Ubar, V. Vislogubov
An Educational Environment for Digital Testing: Hardware, Tools, and Web-Based Runtime Platform. [Citation Graph (0, 0)][DBLP] DSD, 2005, pp:412-419 [Conf]
- Tomas Bengtsson, Artur Jutman, Shashi Kumar, Raimund Ubar, Zebo Peng
Off-Line Testing of Delay Faults in NoC Interconnects. [Citation Graph (0, 0)][DBLP] DSD, 2006, pp:677-680 [Conf]
- Jaan Raik, Raimund Ubar, Sergei Devadze, Artur Jutman
Efficient Single-Pattern Fault Simulation on Structurally Synthesized BDDs. [Citation Graph (0, 0)][DBLP] EDCC, 2005, pp:332-344 [Conf]
- Raimund Ubar, Sergei Devadze, Jaan Raik, Artur Jutman
Ultra Fast Parallel Fault Analysis on Structurally Synthesized BDDs. [Citation Graph (0, 0)][DBLP] European Test Symposium, 2007, pp:131-136 [Conf]
Parallel fault backtracing for calculation of fault coverage. [Citation Graph (, )][DBLP]
Parallel X-fault simulation with critical path tracing technique. [Citation Graph (, )][DBLP]
Calculation of LFSR Seed and Polynomial Pair for BIST Applications. [Citation Graph (, )][DBLP]
Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits. [Citation Graph (, )][DBLP]
Structural fault collapsing by superposition of BDDs for test generation in digital circuits. [Citation Graph (, )][DBLP]
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