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Publications of Author

1. Andreas Wortmann, Sven Simon, Matthias Müller
   A High-Speed Transceiver Architecture Implementable as Synthesizable IP Core. [Citation Graph (0, 0)][DBLP]
   DATE, 2004, pp:46-51 [Conf]
   
2. Marek Wróblewski, Matthias Müller, Andreas Wortmann, Sven Simon, Wilhelm Pieper, Josef A. Nossek
   A power efficient register file architecture using master latch sharing. [Citation Graph (0, 0)][DBLP]
   ISCAS (5), 2003, pp:393-396 [Conf]
   
3. Sven Simon, Matthias Müller, Holger Gryska, Andreas Wortmann, Steffen Buch
   An instruction set for the efficient implementation of the CORDIC algorithm. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:357-360 [Conf]
   
4. Matthias Müller, Andreas Wortmann, Sven Simon, Michael Kugel, Tim Schoenauer
   The impact of clock gating schemes on the power dissipation of synthesizable register files. [Citation Graph (0, 0)][DBLP]
   ISCAS (2), 2004, pp:609-612 [Conf]
   
5. Matthias Müller, Andreas Wortmann, Sven Simon, S. Wolter, Steffen Buch, Marek Wróblewski, Josef A. Nossek
   Low power register file architecture for application specific DSPs. [Citation Graph (0, 0)][DBLP]
   ISCAS (4), 2002, pp:89-92 [Conf]
   
6. Matthias Müller, Andreas Wortmann, Dominik Mader, Sven Simon
   Register Isolation for Synthesizable Register Files. [Citation Graph (0, 0)][DBLP]
   PATMOS, 2004, pp:228-237 [Conf]
   
7. Matthias Müller, Sven Simon, Holger Gryska, Andreas Wortmann, Steffen Buch
   Low power synthesizable register files for processor and IP cores. [Citation Graph (0, 0)][DBLP]
   Integration, 2006, v:39, n:2, pp:131-155 [Journal]