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Nagaraj Ns: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Lun Ye, Foong-Charn Chang, Peter Feldmann, Rakesh Chadha, Nagaraj Ns, Frank Cano
    Chip-Level Verification for Parasitic Coupling Effects in Deep-Submicron Digital Designs. [Citation Graph (0, 0)][DBLP]
    DATE, 1999, pp:658-663 [Conf]
  2. Nagaraj Ns, Frank Cano, Sudha Thiruvengadam, Deepak Kapoor
    Performance and Reliability Verification of C6201/C6701 Digital Signal Processors. [Citation Graph (0, 0)][DBLP]
    ICCD, 1999, pp:521-0 [Conf]
  3. Nagaraj Ns, Poras T. Balsara, Cyrus Cantrell
    Crosstalk Noise Verification in Digital Designs with Interconnect Process Variations. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 2001, pp:365-370 [Conf]
  4. Nagaraj Ns, Poras T. Balsara, Cyrus Cantrell
    Mini-Tutorial: Bridging the Gap between TCAD and ECAD Methodologies in Deep Sub-Micron Interconnect Extraction and Analysis. [Citation Graph (0, 0)][DBLP]
    VLSI Design, 1999, pp:6-11 [Conf]

  5. What's cool for the future of ultra low power designs? [Citation Graph (, )][DBLP]


  6. Who solves the variability problem? [Citation Graph (, )][DBLP]


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