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Paul Zuber: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Paul Zuber, Armin Windschiegl, Raúl Medina Beltán de Otálora, Walter Stechele, Andreas Herkersdorf
    Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization. [Citation Graph (0, 0)][DBLP]
    DATE, 2005, pp:986-987 [Conf]
  2. Paul Zuber, Florian Helmut Müller, Walter Stechele
    Optimization Potential of CMOS Power by Wire Spacing. [Citation Graph (0, 0)][DBLP]
    GI Jahrestagung (1), 2005, pp:344-348 [Conf]
  3. Armin Windschiegl, Paul Zuber, Walter Stechele
    Exploiting Metal Layer Characteristics for Low-Power Routing. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2002, pp:55-64 [Conf]
  4. Paul Zuber, Peter Gritzmann, Michael Ritter, Walter Stechele
    The Optimal Wire Order for Low Power CMOS. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:674-683 [Conf]

  5. A holistic approach for statistical SRAM analysis. [Citation Graph (, )][DBLP]


  6. Statistical SRAM analysis for yield enhancement. [Citation Graph (, )][DBLP]


  7. Variability aware modeling of SoCs: From device variations to manufactured system yield. [Citation Graph (, )][DBLP]


  8. Exponent Monte Carlo for Quick Statistical Circuit Simulation. [Citation Graph (, )][DBLP]


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