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Publications of Author

1. Yervant Zorian, Paolo Prinetto, João Paulo Teixeira, Isabel C. Teixeira, Carlos Eduardo Pereira, O. P. Dias, Jorge Semião, Peter Muhmenthaler, W. Radermacher
   Embedded tutorial: TRP: integrating embedded test and ATE. [Citation Graph (0, 0)][DBLP]
   DATE, 2001, pp:34-37 [Conf]
   
2. F. Guerreiro, Jorge Semião, A. Pierce, Marcelino B. Santos, I. M. Teixeira, João Paulo Teixeira
   Functional-Oriented BIST of Sequential Circuits Aiming at Dynamic Faults Coverage. [Citation Graph (0, 0)][DBLP]
   DDECS, 2006, pp:279-284 [Conf]
   
3. Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira
   Improving Tolerance to Power-Supply and Temperature Variations in Synchronous Circuits. [Citation Graph (0, 0)][DBLP]
   DDECS, 2007, pp:295-300 [Conf]
   
4. M. Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira
   Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2006, pp:257-262 [Conf]
   
5. O. P. Dias, Jorge Semião, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira
   Quality of Electronic Design: From Architectural Level to Test Coverage. [Citation Graph (0, 0)][DBLP]
   ISQED, 2000, pp:197-0 [Conf]
   
6. Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, J. P. Teixeira
   Enhancing the Tolerance to Power-Supply Instability in Digital Circuits. [Citation Graph (0, 0)][DBLP]
   ISVLSI, 2007, pp:207-212 [Conf]
   
7. Jorge Semião, J. Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, J. P. Teixeira
   On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits. [Citation Graph (0, 0)][DBLP]
   IOLTS, 2007, pp:167-172 [Conf]
   
8. 
   Process Tolerant Design Using Thermal and Power-Supply Tolerance in Pipeline Based Circuits. [Citation Graph (, )][DBLP]
   
   
9. 
   Improving the Tolerance of Pipeline Based Circuits to Power Supply or Temperature Variations. [Citation Graph (, )][DBLP]
   
   
10. 
    Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits. [Citation Graph (, )][DBLP]
    
    
11. 
    Delay-fault tolerance to power supply Voltage disturbances analysis in nanometer technologies. [Citation Graph (, )][DBLP]
    
    
12. 
    Signal Integrity Enhancement in Digital Circuits. [Citation Graph (, )][DBLP]