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Chia-Tien Dan Lo:
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Publications of Author
- Mayumi Kato, Chia-Tien Dan Lo
Compression for Low Power Consumption in Battery-powered Handsets. [Citation Graph (0, 0)][DBLP] DCC, 2007, pp:386- [Conf]
- Huang-Chun Roan, Chien-Min Ou, Wen-Jyi Hwang, Chia-Tien Dan Lo
Efficient Logic Circuit for Network Intrusion Detection. [Citation Graph (0, 0)][DBLP] EUC, 2006, pp:776-784 [Conf]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
Scalable Hardware-Algorithm for Mark-Sweep Garbage Collection. [Citation Graph (0, 0)][DBLP] EUROMICRO, 2000, pp:1274-1281 [Conf]
- Mayumi Kato, Chia-Tien Dan Lo
Hardware Solution to Java Compressed Heap. [Citation Graph (0, 0)][DBLP] FCCM, 2005, pp:307-308 [Conf]
- Farn Wang, Chia-Tien Dan Lo
Procedure-Level Verification of Real-time Concurrent Systems. [Citation Graph (0, 0)][DBLP] FME, 1996, pp:682-701 [Conf]
- J. Morris Chang, Witawas Srisa-an, Chia-Tien Dan Lo
Architectural Support for Dynamic Memory Management. [Citation Graph (0, 0)][DBLP] ICCD, 2000, pp:99-104 [Conf]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
A Performance Analysis of the Active Memory System. [Citation Graph (0, 0)][DBLP] ICCD, 2001, pp:493-496 [Conf]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
Performance Enhancements to the Active Memory System. [Citation Graph (0, 0)][DBLP] ICCD, 2002, pp:249-0 [Conf]
- Chia-Tien Dan Lo, Witawas Srisa-an, J. Morris Chang
A Multithreaded Concurrent Garbage Collector Parallelizing the New Instruction in Java. [Citation Graph (0, 0)][DBLP] IPDPS, 2002, pp:- [Conf]
- Mayumi Kato, Chia-Tien Dan Lo
Impact of Java Compressed Heap on Mobile/Wireless Communication. [Citation Graph (0, 0)][DBLP] ITCC (2), 2005, pp:2-7 [Conf]
- Chia-Tien Dan Lo, J. Morris Chang, Ophir Frieder, David A. Grossman
The Object Behavior of Java Object-Oriented Database Management Systems. [Citation Graph (0, 0)][DBLP] ITCC, 2002, pp:247-253 [Conf]
- Chia-Tien Dan Lo
The Design of a Self-Maintained Memory Module for Real-Time Systems. [Citation Graph (0, 0)][DBLP] IWSOC, 2003, pp:337-342 [Conf]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
A hardware implementation of realloc function. [Citation Graph (0, 0)][DBLP] Integration, 2000, v:28, n:2, pp:173-184 [Journal]
- J. Morris Chang, Witawas Srisa-an, Chia-Tien Dan Lo, Edward F. Gehringer
DMMX: Dynamic memory management extensions. [Citation Graph (0, 0)][DBLP] Journal of Systems and Software, 2002, v:63, n:3, pp:187-199 [Journal]
- Chia-Tien Dan Lo, Witawas Srisa-an, J. Morris Chang
A study of page replacement performance in garbage collection heap. [Citation Graph (0, 0)][DBLP] Journal of Systems and Software, 2001, v:58, n:3, pp:235-245 [Journal]
- Chia-Tien Dan Lo, Witawas Srisa-an, J. Morris Chang
The design and analysis of a quantitative simulator for dynamic memory management [Citation Graph (0, 0)][DBLP] Journal of Systems and Software, 2004, v:72, n:3, pp:443-453 [Journal]
- Farn Wang, Chia-Tien Dan Lo
Procedure-Level Verification of Real-time Concurrent Systems. [Citation Graph (0, 0)][DBLP] Real-Time Systems, 1999, v:16, n:1, pp:81-114 [Journal]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
Active Memory Processor: A Hardware Garbage Collector for Real-Time Java Embedded Devices. [Citation Graph (0, 0)][DBLP] IEEE Trans. Mob. Comput., 2003, v:2, n:2, pp:89-101 [Journal]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
A performance perspective on the Active Memory System. [Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2002, v:26, n:9-10, pp:421-432 [Journal]
- Huang-Chun Roan, Wen-Jyi Hwang, Chia-Tien Dan Lo
Shift-Or Circuit for Efficient Network Intrusion Detection Pattern Matching. [Citation Graph (0, 0)][DBLP] FPL, 2006, pp:1-6 [Conf]
- Mayumi Kato, Chia-Tien Dan Lo
A heap de/compression module for wireless Java. [Citation Graph (0, 0)][DBLP] PPPJ, 2004, pp:91-99 [Conf]
- Mayumi Kato, Chia-Tien Dan Lo
Growing adaptation of computer science in Bioinfomatics. [Citation Graph (0, 0)][DBLP] ISICT, 2004, pp:226-231 [Conf]
- Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
Object resizing and reclamation through the use of hardware bit-maps. [Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2002, v:25, n:9-10, pp:459-467 [Journal]
- Chia-Tien Dan Lo, J. Morris Chang
FPGA-based reconfigurable computing III. [Citation Graph (0, 0)][DBLP] Microprocessors and Microsystems, 2007, v:31, n:8, pp:475-476 [Journal]
Applying Out-of-Core QR Decomposition Algorithms on FPGA-Based Systems. [Citation Graph (, )][DBLP]
Accelerating matrix decomposition with replications. [Citation Graph (, )][DBLP]
Hardware implementation for network intrusion detection rules with regular expression support. [Citation Graph (, )][DBLP]
An Improved Reduction Algorithm With Deeply Pipelined Operators. [Citation Graph (, )][DBLP]
Highly Space Efficient Counters for Perl Compatible Regular Expressions in FPGAs. [Citation Graph (, )][DBLP]
Inquiry-based active learning in introductory programming courses. [Citation Graph (, )][DBLP]
Portable labs in a box for embedded system education. [Citation Graph (, )][DBLP]
Innovative CS capstone projects on green energy applications with WSN in a box. [Citation Graph (, )][DBLP]
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