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Andrzej Kos: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Ireneusz Brzozowski, Andrzej Kos
    Two-level Logic Synthesis for Low Power Based on New Model of Power Dissipation. [Citation Graph (0, 0)][DBLP]
    DDECS, 2007, pp:139-144 [Conf]
  2. Adam Golda, Andrzej Kos
    Temperature Influence on Power Consumption and Time Delay. [Citation Graph (0, 0)][DBLP]
    DSD, 2003, pp:378-383 [Conf]
  3. Ireneusz Brzozowski, Andrzej Kos
    Minimization of Power Consumption in Digital Integrated Circuits by Reduction of Switching Activity. [Citation Graph (0, 0)][DBLP]
    EUROMICRO, 1999, pp:1376-0 [Conf]
  4. Andrzej Kos
    An approach to thermal placement in power electronics using neural networks. [Citation Graph (0, 0)][DBLP]
    ISCAS, 1993, pp:2427-2430 [Conf]
  5. Ireneusz Brzozowski, Andrzej Kos
    Power Dissipation Reduction During Synthesis of Two-Level Logic Based on Probability of Input Vectors Changes. [Citation Graph (0, 0)][DBLP]
    PATMOS, 2005, pp:456-465 [Conf]
  6. Adam Golda, Andrzej Kos
    Static Versus Dynamic Power Losses in CMOS VLSI Systems Considering Temperature. [Citation Graph (0, 0)][DBLP]
    VLSI-SOC, 2003, pp:252-257 [Conf]
  7. Piotr Dziurdzia, Andrzej Kos
    Monitoring of power dissipated in microelectronic structures. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:12, pp:1971-1978 [Journal]
  8. Piotr Bratek, Andrzej Kos
    A method of thermal testing of microsystems. [Citation Graph (0, 0)][DBLP]
    Microelectronics Reliability, 2001, v:41, n:11, pp:1877-1887 [Journal]

  9. Neural Processor as a Dynamic Power Manager for Digital Systems. [Citation Graph (, )][DBLP]


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