The SCEAS System
Navigation Menu

Search the dblp DataBase

Title:
Author:

Marcel Baláz: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík
    An Improved MDCT IP Core Generator with Architectural Model Simulation. [Citation Graph (0, 0)][DBLP]
    DDECS, 2007, pp:193-198 [Conf]
  2. Martin Simlastík, Peter Malík, Tomás Pikula, Marcel Baláz
    FPGA Implementation of a Fast MDCT Algorithm. [Citation Graph (0, 0)][DBLP]
    DDECS, 2006, pp:228-229 [Conf]
  3. Peter Malík, Marcel Baláz, Tomás Pikula, Martin Simlastík
    MDCT IP Core Generator with Architectural Model Simulation. [Citation Graph (0, 0)][DBLP]
    VLSI-SoC, 2006, pp:18-23 [Conf]

  4. MDCT / IMDCT low power implementations in 90 nm CMOS technology for MP3 audio. [Citation Graph (, )][DBLP]


  5. Various MDCT implementations in 0.35µm CMOS. [Citation Graph (, )][DBLP]


Search in 0.002secs, Finished in 0.003secs
NOTICE1
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
NOTICE2
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
 
System created by asidirop@csd.auth.gr [http://users.auth.gr/~asidirop/] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002