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Jiri Kadlec: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Jiri Kadlec, Martin Danek
    Design and Verification Methodology for Reconfigurable Designs in Atmel FPSLIC. [Citation Graph (0, 0)][DBLP]
    DDECS, 2006, pp:79-80 [Conf]
  2. Zdenek Pohl, Rudolf Matousek, Jiri Kadlec, Milan Tichý, Miroslav Lícko
    Lattice adaptive filter implementation for FPGA. [Citation Graph (0, 0)][DBLP]
    FPGA, 2003, pp:246- [Conf]
  3. Felix Albu, Jiri Kadlec, Chris Softley, Rudolf Matousek, Antonin Hermanek, Nick Coleman, Anthony Fagan
    Implementation of (Normalised) RLS Lattice on Virtex. [Citation Graph (0, 0)][DBLP]
    FPL, 2001, pp:91-100 [Conf]
  4. Antonin Hermanek, Zdenek Pohl, Jiri Kadlec
    FPGA Implementation of the Adpaptive Lattice Filter. [Citation Graph (0, 0)][DBLP]
    FPL, 2003, pp:1095-1098 [Conf]
  5. Rudolf Matousek, Milan Tichý, Zdenek Pohl, Jiri Kadlec, Chris Softley, Nick Coleman
    Logarithmic Number System and Floating-Point Arithmetics on FPGA. [Citation Graph (0, 0)][DBLP]
    FPL, 2002, pp:627-636 [Conf]
  6. Zdenek Pohl, Premysl Sucha, Jiri Kadlec, Zdenek Hanzálek
    Performance Tuning of Iterative Algorithms in Signal Processing. [Citation Graph (0, 0)][DBLP]
    FPL, 2005, pp:699-702 [Conf]
  7. Zdenek Pohl, Jan Schier, Miroslav Lícko, Antonin Hermanek, Milan Tichý, Rudolf Matousek, Jiri Kadlec
    Logarithmic Arithmetic for Real Data Types and Support for Matlab/Simulink Based Rapid-FPGA-Prototyping. [Citation Graph (0, 0)][DBLP]
    IPDPS, 2003, pp:190- [Conf]
  8. Jiri Kadlec
    Parallel Processing on Alphas Under MATLAB 5. [Citation Graph (0, 0)][DBLP]
    SOFSEM, 1997, pp:440-447 [Conf]

  9. Accelerating Microblaze Floating Point Operations. [Citation Graph (, )][DBLP]

  10. Increasing the level of abstraction in FPGA-based designs. [Citation Graph (, )][DBLP]

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