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Prashant Dubey: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskarani
    Built in Defect Prognosis for Embedded Memories. [Citation Graph (0, 0)][DBLP]
    DDECS, 2007, pp:167-172 [Conf]
  2. Akhil Garg, Prashant Dubey
    Fuse Area Reduction based on Quantitative Yield Analysis and Effective Chip Cost. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:166-174 [Conf]
  3. Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskarani
    Low Area Adaptive Fail-Data Compression Methodology for Defect Classification and Production Phase Prognosis. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2007, pp:171-178 [Conf]
  4. Prashant Dubey, Akhil Garg, Sravan Kumar Bhaskarani
    GALS Based Shared Test Architecture for Embedded Memories. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:157-160 [Conf]

  5. On Chip Jitter Measurement through a High Accuracy TDC. [Citation Graph (, )][DBLP]


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