The SCEAS System
Navigation Menu

Search the dblp DataBase


Andreas Steininger: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Babak Rahbaran, Andreas Steininger, Thomas Handl
    Built-in Fault Injection in Hardware - The FIDYCO Example. [Citation Graph (0, 0)][DBLP]
    DELTA, 2004, pp:327-332 [Conf]
  2. Andreas Steininger, Christoph Scherrer
    How Does Resource Utilization Affect Fault Tolerance? [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:251-256 [Conf]
  3. Andreas Steininger, Christoph Scherrer
    How to Tune the MTTF of a Fail-Silent System. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:418-0 [Conf]
  4. Christian El Salloum, Andreas Steininger, Peter Tummeltshammer, Werner Harter
    Recovery Mechanisms for Dual Core Architectures. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:380-388 [Conf]
  5. M. Ferringer, G. Fuchs, A. Steininger, G. Kempf
    VLSI Implementation of a Fault-Tolerant Distributed Clock Generation. [Citation Graph (0, 0)][DBLP]
    DFT, 2006, pp:563-571 [Conf]
  6. Martin Delvai, Andreas Steininger
    Solving the Fundamental Problem of Digital Design - A Systematic Review of Design Methods. [Citation Graph (0, 0)][DBLP]
    DSD, 2006, pp:131-138 [Conf]
  7. Thomas Kottke, Andreas Steininger
    A Reconfigurable Generic Dual-Core Architecture. [Citation Graph (0, 0)][DBLP]
    DSN, 2006, pp:45-54 [Conf]
  8. Martin Delvai, Wolfgang Huber, Peter P. Puschner, Andreas Steininger
    Processor Support for Temporal Predictability - The SPEAR Design Example. [Citation Graph (0, 0)][DBLP]
    ECRTS, 2003, pp:169-176 [Conf]
  9. Andreas Steininger, H. Schweinzer
    A Model for the Analysis of the Fault Injection Process. [Citation Graph (0, 0)][DBLP]
    FTCS, 1995, pp:186-195 [Conf]
  10. Andreas Steininger, Christoph Scherrer
    On Finding an Optimal Combination of Error Detection Mechanisms Based on Results of Fault Injection Experiments. [Citation Graph (0, 0)][DBLP]
    FTCS, 1997, pp:238-247 [Conf]
  11. Andreas Steininger, Christoph Scherrer
    On the Necessity of On-Line-BIST in Safety-Critical Applications - A Case Study. [Citation Graph (0, 0)][DBLP]
    FTCS, 1999, pp:208-215 [Conf]
  12. Andreas Steininger, Johann Vilanek
    Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example. [Citation Graph (0, 0)][DBLP]
    ICCD, 2002, pp:277-0 [Conf]
  13. Babak Rahbaran, Matthias Fuegger, Andreas Steininger
    Embedded Real-Time-Tracer - An Approach with IDE. [Citation Graph (0, 0)][DBLP]
    WISES, 2004, pp:25-35 [Conf]
  14. Andreas Steininger, Babak Rahbaran, Thomas Handl
    Built-In Fault Injectors - The Logical Continuation of BIST? [Citation Graph (0, 0)][DBLP]
    WISES, 2003, pp:187-196 [Conf]
  15. Thomas Kottke, Andreas Steininger
    A Generic Dual Core Architecture with Error Containment. [Citation Graph (0, 0)][DBLP]
    Computers and Artificial Intelligence, 2004, v:23, n:5, pp:- [Journal]
  16. Johannes Reisinger, Andreas Steininger
    The design of a fail-silent processing node for the predictable hard real-time system MARS. [Citation Graph (0, 0)][DBLP]
    Distributed Systems Engineering, 1993, v:1, n:2, pp:104-111 [Journal]
  17. Andreas Steininger, Christopher Temple
    Economic Online Self-Test in the Time-Triggered Architecture. [Citation Graph (0, 0)][DBLP]
    IEEE Design & Test of Computers, 1999, v:16, n:3, pp:81-89 [Journal]
  18. Andreas Steininger, Christoph Scherrer
    Identifying Efficient Combinations of Error Detection Mechanisms Based on Results of Fault Injection Experiments. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2002, v:51, n:2, pp:235-239 [Journal]
  19. Kristian Ambrosch, Wilfried Kubinger, Martin Humenberger, Andreas Steininger
    Hardware implementation of an SAD based stereo vision algorithm. [Citation Graph (0, 0)][DBLP]
    CVPR, 2007, pp:- [Conf]
  20. Eric Armengaud, Andreas Steininger, Martin Horauer
    Automatic Parameter Identi cation in FlexRay based Automotive Communication Networks. [Citation Graph (0, 0)][DBLP]
    ETFA, 2006, pp:897-904 [Conf]
  21. Eric Armengaud, Andreas Steininger, Martin Horauer
    Efficient stimulus generation for testing embedded distributed systems the FlexRay example. [Citation Graph (0, 0)][DBLP]
    ETFA, 2005, pp:- [Conf]

  22. Remote measurement of local oscillator drifts in FlexRay networks. [Citation Graph (, )][DBLP]

  23. On the role of the power supply as an entry for common cause faults - An experimental analysis. [Citation Graph (, )][DBLP]

  24. Automated Testing of FlexRay Clusters for System Inconsistencies in Automotive Networks. [Citation Graph (, )][DBLP]

  25. Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip. [Citation Graph (, )][DBLP]

  26. Soft Error Tolerant Asynchronous Circuits Based on Dual Redundant Four State Logic. [Citation Graph (, )][DBLP]

  27. On the Risk of Fault Coupling over the Chip Substrate. [Citation Graph (, )][DBLP]

  28. Power supply induced common cause faults-experimental assessment of potential countermeasures. [Citation Graph (, )][DBLP]

  29. Automated generation of explicit connectors for component based hardware/software interaction in embedded real-time systems. [Citation Graph (, )][DBLP]

  30. A Fail-Silent Reconfigurable Superscalar Processor. [Citation Graph (, )][DBLP]

  31. A Metastability-Free Multi-synchronous Communication Scheme for SoCs. [Citation Graph (, )][DBLP]

  32. An investigation of the clique problem in FlexRay. [Citation Graph (, )][DBLP]

Search in 0.003secs, Finished in 0.004secs
System may not be available sometimes or not working properly, since it is still in development with continuous upgrades
The rankings that are presented on this page should NOT be considered as formal since the citation info is incomplete in DBLP
System created by [] © 2002
for Data Engineering Laboratory, Department of Informatics, Aristotle University © 2002