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V. C. Prasad:
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 P. W. Chandana Prasad, Bruce Mills, Ali Assi, S. M. N. Arosha Senanayake, V. C. Prasad
Evaluation time Estimation for Pass Transistor Logic circuits. [Citation Graph (0, 0)][DBLP] DELTA, 2006, pp:422428 [Conf]
 Sanjeev Saxena, P. C. P. Bhatt, V. C. Prasad
On Parallel Sorting and Addition with Concurrent Writes. [Citation Graph (0, 0)][DBLP] FSTTCS, 1988, pp:143153 [Conf]
 P. C. P. Bhatt, Krzysztof Diks, Torben Hagerup, V. C. Prasad, Tomasz Radzik, Sanjeev Saxena
Improved Deterministic Parallel Integer Sorting [Citation Graph (0, 0)][DBLP] Inf. Comput., 1991, v:94, n:1, pp:2947 [Journal]
 Sanjeev Saxena, Pramod Chandra P. Bhatt, V. C. Prasad
On Parallel Prefix Computation. [Citation Graph (0, 0)][DBLP] Parallel Processing Letters, 1994, v:4, n:, pp:429436 [Journal]
 Sanjeev Saxena, P. C. P. Bhatt, V. C. Prasad
Efficient VLSI Parallel Algorithm for Delaunay Triangulation on Orthogonal Tree Network in Two and Three Dimensions. [Citation Graph (0, 0)][DBLP] IEEE Trans. Computers, 1990, v:39, n:3, pp:400404 [Journal]
 Navneet K. Jain, V. C. Prasad, A. B. Bhattacharyya
Delay time sensitivity in nonlinear monotone RC trees. [Citation Graph (0, 0)][DBLP] IEEE Trans. on CAD of Integrated Circuits and Systems, 1990, v:9, n:5, pp:554560 [Journal]
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