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Gian-Carlo Cardarilli: [Publications] [Author Rank by year] [Co-authors] [Prefers] [Cites] [Cited by]

Publications of Author

  1. Gian-Carlo Cardarilli, Stefano Bertazzoni, Marcello Salmeri, Adelio Salsano, P. Marinucci
    Design of Fault-Tolerant Solid State Mass Memory. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:302-310 [Conf]
  2. Gian-Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Error Detection in Signed Digit Arithmetic Circuit with Parity Checker. [Citation Graph (0, 0)][DBLP]
    DFT, 2003, pp:401-408 [Conf]
  3. Gian-Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Data Integrity Evaluations of Reed Solomon Codes for Storage Systems. [Citation Graph (0, 0)][DBLP]
    DFT, 2004, pp:158-164 [Conf]
  4. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    A Self Checking Reed Solomon Encoder: Design and Analysis. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:111-119 [Conf]
  5. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    FPGA oriented design of parity sharing RS codecs. [Citation Graph (0, 0)][DBLP]
    DFT, 2005, pp:259-265 [Conf]
  6. Gian-Carlo Cardarilli, Adelio Salsano, P. Marinucci, Marco Ottavi
    A Fault-Tolerant 176 Gbit Solid State Mass Memory Architecture. [Citation Graph (0, 0)][DBLP]
    DFT, 2000, pp:173-0 [Conf]
  7. Gian-Carlo Cardarilli, M. Di Zenzo, Pat O. Pistilli, Adelio Salsano
    A High Speed Reed-Solomon Encoder-Decoder for Fault Tolerant Solid State Disks. [Citation Graph (0, 0)][DBLP]
    DFT, 1993, pp:33-40 [Conf]
  8. Stefano Bertazzoni, Gian-Carlo Cardarilli, D. Piergentili, Marcello Salmeri, Adelio Salsano, Domenico Di Giovenale, G. C. Grande, P. Marinucci, S. Sperandei, S. Bartalucci, G. Mazzenga, M. Ricci, V. Bidoli, D. de Francesco, P. G. Picozza, A. Rovelli
    Failure Tests on 64 Mb SDRAM in Radiation Environment. [Citation Graph (0, 0)][DBLP]
    DFT, 1999, pp:158-164 [Conf]
  9. Marco Ottavi, Gian-Carlo Cardarilli, D. Cellitti, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Design of a Totally Self Checking Signature Analysis Checker for Finite State Machines. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:403-411 [Conf]
  10. Salvatore Pontarelli, Gian-Carlo Cardarilli, A. Malvoni, Marco Ottavi, Marco Re, Adelio Salsano
    System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology. [Citation Graph (0, 0)][DBLP]
    DFT, 2001, pp:455-460 [Conf]
  11. Gian-Carlo Cardarilli, F. Kaddour, A. Leandri, Marco Ottavi, Salvatore Pontarelli, Raoul Velazco
    Bit Flip Injection in Processor-Based Architectures: A Case Study. [Citation Graph (0, 0)][DBLP]
    IOLTW, 2002, pp:117-0 [Conf]
  12. Gian-Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    A Signed Digit Adder with Error Correction and Graceful Degradation Capabilities. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2004, pp:141-148 [Conf]
  13. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Design of a Self Checking Reed Solomon Encoder. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2005, pp:201-202 [Conf]
  14. Gian-Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Localization of Faults in Radix-n Signed Digit Adders. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2006, pp:178-180 [Conf]
  15. Gian-Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    A fault tolerant hardware based file system manager for solid state mass memory. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:649-652 [Conf]
  16. Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re
    Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2005, pp:1102-1105 [Conf]
  17. Gian-Carlo Cardarilli, Andrea Del Re, Marco Re
    IP based reconfigurable digital platform for satellite communications. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2003, pp:37-40 [Conf]
  18. Alberto Nannarelli, Gian-Carlo Cardarilli, Marco Re
    Power-delay tradeoffs in residue number system. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2003, pp:413-416 [Conf]
  19. Alberto Nannarelli, Marco Re, Gian-Carlo Cardarilli
    Tradeoffs between residue number system and traditional FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2001, pp:305-308 [Conf]
  20. Marco Re, Alberto Nannarelli, Gian-Carlo Cardarilli, Roberto Lojacono
    FPGA realization of RNS to binary signed conversion architecture. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:350-353 [Conf]
  21. Marco Ottavi, Gian-Carlo Cardarilli, P. Marinucci, Salvatore Pontarelli, Adelio Salsano
    Development of a dynamic routing system for a fault tolerant solid state mass memory. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2001, pp:830-833 [Conf]
  22. Alberto L. Sangiovanni-Vincentelli, Marco Re, Luciano Lavagno, Gian-Carlo Cardarilli, Roberto Lojacono
    Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 1999, pp:334-338 [Conf]
  23. Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re
    Low-power implementation of polyphase filters in Quadratic Residue Number system. [Citation Graph (0, 0)][DBLP]
    ISCAS (2), 2004, pp:725-728 [Conf]
  24. Salvatore Pontarelli, Gian-Carlo Cardarilli, A. Leandri, Marco Ottavi, Marco Re, Adelio Salsano
    A self-checking cell logic block for fault tolerant FPGAs. [Citation Graph (0, 0)][DBLP]
    ISCAS (4), 2002, pp:477-480 [Conf]
  25. Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re
    Power characterization of digital filters implemented on FPGA. [Citation Graph (0, 0)][DBLP]
    ISCAS (5), 2002, pp:801-804 [Conf]
  26. Marco Ottavi, Luca Schiano, Fabrizio Lombardi, Salvatore Pontarelli, Gian-Carlo Cardarilli
    Evaluating the Data Integrity of Memory Systems by Configurable Markov Models. [Citation Graph (0, 0)][DBLP]
    ISVLSI, 2005, pp:257-259 [Conf]
  27. Gian-Carlo Cardarilli, Marco Re, Roberto Lojacono
    VLSI implementation of a real time fuzzy processor. [Citation Graph (0, 0)][DBLP]
    Journal of Intelligent and Fuzzy Systems, 1998, v:6, n:3, pp:389-401 [Journal]
  28. Gian-Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Fault Localization, Error Correction, and Graceful Degradation in Radix 2 Signed Digit-Based Adders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2006, v:55, n:5, pp:534-540 [Journal]
  29. Salvatore Pontarelli, Luca Sterpone, Gian-Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
    Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders. [Citation Graph (0, 0)][DBLP]
    IOLTS, 2007, pp:194-196 [Conf]
  30. G. L. Bernocchi, Gian-Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re
    Low-power adaptive filter based on RNS components. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2007, pp:3211-3214 [Conf]
  31. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Concurrent error detection in Reed Solomon decoders. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  32. Gian-Carlo Cardarilli, Andrea Del Re, Marco Re, L. Simone
    Optimized QPSK modulator for DVB-S applications. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  33. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Fault tolerant design of signed digit based FIR filters. [Citation Graph (0, 0)][DBLP]
    ISCAS, 2006, pp:- [Conf]
  34. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Analysis of Errors and Erasures in Parity Sharing RS Codecs. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. Computers, 2007, v:56, n:12, pp:1721-1726 [Journal]
  35. Gian-Carlo Cardarilli, A. Leandri, P. Marinucci, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Design of a fault tolerant solid state mass memory. [Citation Graph (0, 0)][DBLP]
    IEEE Transactions on Reliability, 2003, v:52, n:4, pp:476-491 [Journal]
  36. Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano
    Concurrent Error Detection in Reed-Solomon Encoders and Decoders. [Citation Graph (0, 0)][DBLP]
    IEEE Trans. VLSI Syst., 2007, v:15, n:7, pp:842-846 [Journal]
  37. Gian-Carlo Cardarilli, Fabrizio Lombardi, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
    A Comparative Evaluation of Designs for Reliable Memory Systems. [Citation Graph (0, 0)][DBLP]
    J. Electronic Testing, 2005, v:21, n:4, pp:429-444 [Journal]

  38. Optimization of Self Checking FIR filters by means of Fault Injection Analysis. [Citation Graph (, )][DBLP]


  39. A Novel Error Detection and Correction Technique for RNS Based FIR Filters. [Citation Graph (, )][DBLP]


  40. Error Correction Codes for SEU and SEFI Tolerant Memory Systems. [Citation Graph (, )][DBLP]


  41. Totally Fault Tolerant RNS Based FIR Filters. [Citation Graph (, )][DBLP]


  42. Error detection in addition chain based ECC Point Multiplication. [Citation Graph (, )][DBLP]


  43. ADAPTO: full-adder based reconfigurable architecture for bit level operations. [Citation Graph (, )][DBLP]


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